re PR target/53033 ([avr]: Wrong register number for 3-byte loads via X)

	PR target/53033
	* config/avr/avr.c (avr_out_load_psi): Fix assembler template for
	the case *(X+const).

From-SVN: r186588

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 61dd836eeb77ad128cc1dcbc22a5ea4cbe489885..086b8136f50076adff566ed31cc27d78c12dada5 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2012-04-19  Georg-Johann Lay  <avr@gjlay.de>
+
+       PR target/53033
+       * config/avr/avr.c (avr_out_load_psi): Fix assembler template for
+       the case *(X+const).
+
 2012-04-19  Ramana Radhakrishnan  <ramana.radhakrishnan@linaro.org>
 
        * config/arm/sync.md (sync_optab): Change ior attribute to "or".

diff --git a/gcc/config/avr/avr.c b/gcc/config/avr/avr.c
index c25f8983a79002887df64e65d605e691ce147496..af00aeea07af6cae9f78c92ae3ceccc9ccdf851e 100644 (file)
--- a/gcc/config/avr/avr.c
+++ b/gcc/config/avr/avr.c
@@ -3476,15 +3476,16 @@ avr_out_load_psi (rtx insn, rtx *op, int *plen)
                                   "mov r27,__tmp_reg__", op, plen, -6);
             }
           
-            avr_asm_len ("adiw r26,%o1"      CR_TAB
-                         "ld r24,X+"         CR_TAB
-                         "ld r25,X+"         CR_TAB
-                         "ld r26,X", op, plen, -4);
+          avr_asm_len ("adiw r26,%o1" CR_TAB
+                       "ld %A0,X+"    CR_TAB
+                       "ld %B0,X+"    CR_TAB
+                       "ld %C0,X", op, plen, -4);
 
-            if (reg_dest != REG_X - 2)
-              avr_asm_len ("sbiw r26,%o1+2", op, plen, 1);
+          if (reg_dest != REG_W
+              && !reg_unused_after (insn, XEXP (base, 0)))
+            avr_asm_len ("sbiw r26,%o1+2", op, plen, 1);
 
-            return "";
+          return "";
         }
       
       if (reg_dest == reg_base)