CCP: handle division by a power of 2 as a right shift.

We have some code in range-ops that sets better maybe nonzero bits for
TRUNC_DIV_EXPR by a power of 2 than CCP does, by just shifting the
mask.  I'd like to offload this functionality into the CCP mask
tracking code, which already does the right thing for right shifts.

The testcase for this change is gcc.dg/tree-ssa/vrp123.c and
gcc.dg/tree-ssa/pr107541.c.

gcc/ChangeLog:

	* range-op.cc (operator_div::fold_range): Call
	update_known_bitmask.
	* tree-ssa-ccp.cc (bit_value_binop): Handle divisions by powers of
	2 as a right shift.

diff --git a/gcc/range-op.cc b/gcc/range-op.cc
index 846931ddcae5a96e7fd222705df0110aea246cd3..8ff5d5b4c7892338537df0d045393fafce5d7ef7 100644 (file)
--- a/gcc/range-op.cc
+++ b/gcc/range-op.cc
@@ -1995,23 +1995,7 @@ operator_div::fold_range (irange &r, tree type,
   if (!cross_product_operator::fold_range (r, type, lh, rh, trio))
     return false;
 
-  if (lh.undefined_p ())
-    return true;
-
-  tree t;
-  if (code == TRUNC_DIV_EXPR
-      && rh.singleton_p (&t)
-      && !wi::neg_p (lh.lower_bound ()))
-    {
-      wide_int wi = wi::to_wide (t);
-      int shift = wi::exact_log2 (wi);
-      if (shift != -1)
-       {
-         wide_int nz = lh.get_nonzero_bits ();
-         nz = wi::rshift (nz, shift, TYPE_SIGN (type));
-         r.set_nonzero_bits (nz);
-       }
-    }
+  update_known_bitmask (r, code, lh, rh);
   return true;
 }
 

diff --git a/gcc/tree-ssa-ccp.cc b/gcc/tree-ssa-ccp.cc
index 3a4b6bc111877c4717c9732f26654655ebcccb89..2bcd90646f63063b854ea417d7eb5a12e6ef81c3 100644 (file)
--- a/gcc/tree-ssa-ccp.cc
+++ b/gcc/tree-ssa-ccp.cc
@@ -1934,6 +1934,18 @@ bit_value_binop (enum tree_code code, signop sgn, int width,
       {
        widest_int r1max = r1val | r1mask;
        widest_int r2max = r2val | r2mask;
+       if (r2mask == 0 && !wi::neg_p (r1max))
+         {
+           widest_int shift = wi::exact_log2 (r2val);
+           if (shift != -1)
+             {
+               // Handle division by a power of 2 as an rshift.
+               bit_value_binop (RSHIFT_EXPR, sgn, width, val, mask,
+                                r1type_sgn, r1type_precision, r1val, r1mask,
+                                r2type_sgn, r2type_precision, shift, r2mask);
+               return;
+             }
+         }
        if (sgn == UNSIGNED
            || (!wi::neg_p (r1max) && !wi::neg_p (r2max)))
          {