]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
media: staging: media: omap4iss: code style - avoid macro argument precedence issues
authorNikolay Kyx <knv418@gmail.com>
Sun, 21 Feb 2021 19:53:08 +0000 (20:53 +0100)
committerMauro Carvalho Chehab <mchehab+huawei@kernel.org>
Tue, 23 Mar 2021 15:53:39 +0000 (16:53 +0100)
This patch fixes the following checkpatch.pl check:

CHECK: Macro argument 'i' may be better as '(i)' to avoid precedence issues

in file iss_regs.h

Link: https://lore.kernel.org/linux-media/20210221195308.1451-1-knv418@gmail.com
Signed-off-by: Nikolay Kyx <knv418@gmail.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
drivers/staging/media/omap4iss/iss_regs.h

index 09a7375c89ac023262a66cc4d03f382916678d9e..cfe0bb0750723cd063851ea8ff52f967d38051df 100644 (file)
 #define CSI2_TIMING_STOP_STATE_COUNTER_IO1_MASK                (0x1fff << 0)
 #define CSI2_TIMING_STOP_STATE_COUNTER_IO1_SHIFT       0
 
-#define CSI2_CTX_CTRL1(i)                              (0x70 + (0x20 * i))
+#define CSI2_CTX_CTRL1(i)                              (0x70 + (0x20 * (i)))
 #define CSI2_CTX_CTRL1_GENERIC                         BIT(30)
 #define CSI2_CTX_CTRL1_TRANSCODE                       (0xf << 24)
 #define CSI2_CTX_CTRL1_FEC_NUMBER_MASK                 (0xff << 16)
 #define CSI2_CTX_CTRL1_PING_PONG                       BIT(3)
 #define CSI2_CTX_CTRL1_CTX_EN                          BIT(0)
 
-#define CSI2_CTX_CTRL2(i)                              (0x74 + (0x20 * i))
+#define CSI2_CTX_CTRL2(i)                              (0x74 + (0x20 * (i)))
 #define CSI2_CTX_CTRL2_FRAME_MASK                      (0xffff << 16)
 #define CSI2_CTX_CTRL2_FRAME_SHIFT                     16
 #define CSI2_CTX_CTRL2_USER_DEF_MAP_SHIFT              13
 #define CSI2_CTX_CTRL2_FORMAT_MASK                     (0x3ff << 0)
 #define CSI2_CTX_CTRL2_FORMAT_SHIFT                    0
 
-#define CSI2_CTX_DAT_OFST(i)                           (0x78 + (0x20 * i))
+#define CSI2_CTX_DAT_OFST(i)                           (0x78 + (0x20 * (i)))
 #define CSI2_CTX_DAT_OFST_MASK                         (0xfff << 5)
 
-#define CSI2_CTX_PING_ADDR(i)                          (0x7c + (0x20 * i))
+#define CSI2_CTX_PING_ADDR(i)                          (0x7c + (0x20 * (i)))
 #define CSI2_CTX_PING_ADDR_MASK                                0xffffffe0
 
-#define CSI2_CTX_PONG_ADDR(i)                          (0x80 + (0x20 * i))
+#define CSI2_CTX_PONG_ADDR(i)                          (0x80 + (0x20 * (i)))
 #define CSI2_CTX_PONG_ADDR_MASK                                CSI2_CTX_PING_ADDR_MASK
 
-#define CSI2_CTX_IRQENABLE(i)                          (0x84 + (0x20 * i))
-#define CSI2_CTX_IRQSTATUS(i)                          (0x88 + (0x20 * i))
+#define CSI2_CTX_IRQENABLE(i)                          (0x84 + (0x20 * (i)))
+#define CSI2_CTX_IRQSTATUS(i)                          (0x88 + (0x20 * (i)))
 
-#define CSI2_CTX_CTRL3(i)                              (0x8c + (0x20 * i))
+#define CSI2_CTX_CTRL3(i)                              (0x8c + (0x20 * (i)))
 #define CSI2_CTX_CTRL3_ALPHA_SHIFT                     5
 #define CSI2_CTX_CTRL3_ALPHA_MASK                      \
                (0x3fff << CSI2_CTX_CTRL3_ALPHA_SHIFT)