sim: bfin: handle AZ updates with 16bit adds/subs

We weren't updating AZ when doing a 16bit add or sub insn.  Implement it.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>

diff --git a/sim/bfin/ChangeLog b/sim/bfin/ChangeLog
index deaf6158616ecf724a656702854d3de0bd8d59b7..5973570f95c7f091b7d4031f2567e3799adbf3cc 100644 (file)
--- a/sim/bfin/ChangeLog
+++ b/sim/bfin/ChangeLog
@@ -1,3 +1,8 @@
+2011-03-15  Robin Getz  <robin.getz@analog.com>
+
+       * bfin-sim.c (decode_dsp32alu_0): Set AZ based on val for 16bit adds
+       and subs.
+
 2011-03-15  Robin Getz  <robin.getz@analog.com>
 
        * bfin-sim.c (decode_macfunc): Move acc STOREs behind op != 3 check.

diff --git a/sim/bfin/bfin-sim.c b/sim/bfin/bfin-sim.c
index 14cf41ad70d12c2090770af06d707398c9731659..6415388487046e98993086027c7316f1001920f0 100644 (file)
--- a/sim/bfin/bfin-sim.c
+++ b/sim/bfin/bfin-sim.c
@@ -4128,7 +4128,7 @@ decode_dsp32alu_0 (SIM_CPU *cpu, bu16 iw0, bu16 iw1)
        SET_DREG_L (dst0, val);
 
       SET_ASTATREG (an, val & 0x8000);
-
+      SET_ASTATREG (az, val == 0);
     }
   else if ((aop == 0 || aop == 2) && aopcde == 9 && s == 1)
     {