arm64: dts: ti: k3-am62a-phycore-som: Add boot phase tags

The bootph-all and bootph-pre-ram tags were introduced in dt-schema
(dtschema/schemas/bootph.yaml) to define node usage across different
boot phases.

Add boot phase tags to all required nodes to ensure boot support from
all sources, including UART, USB (DFU), Ethernet, uSD card, eMMC, and
OSPI NOR Flash.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Link: https://lore.kernel.org/r/20250305085537.3976579-2-w.egorov@phytec.de
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

diff --git a/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi
index a5aceaa396705147089146df6e477d75c2d0589c..7920559e84a3975208de7fbba442a4cbda052109 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi
@@ -42,6 +42,7 @@
                device_type = "memory";
                /* 2G RAM */
                reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
+               bootph-all;
        };
 
        reserved-memory {
@@ -99,6 +100,7 @@
                        AM62AX_IOPAD(0x1e0, PIN_INPUT_PULLUP, 0) /* (D17) I2C0_SCL */
                        AM62AX_IOPAD(0x1e4, PIN_INPUT_PULLUP, 0) /* (E16) I2C0_SDA */
                >;
+               bootph-all;
        };
 
        main_mdio1_pins_default: main-mdio1-default-pins {
@@ -106,6 +108,7 @@
                        AM62AX_IOPAD(0x160, PIN_OUTPUT, 0) /* (V12) MDIO0_MDC */
                        AM62AX_IOPAD(0x15c, PIN_INPUT, 0) /* (V13) MDIO0_MDIO */
                >;
+               bootph-all;
        };
 
        main_mmc0_pins_default: main-mmc0-default-pins {
@@ -121,6 +124,7 @@
                        AM62AX_IOPAD(0x1fc, PIN_INPUT_PULLUP, 0) /* (W9) MMC0_DAT6 */
                        AM62AX_IOPAD(0x1f8, PIN_INPUT_PULLUP, 0) /* (AB8) MMC0_DAT7 */
                >;
+               bootph-all;
        };
 
        main_rgmii1_pins_default: main-rgmii1-default-pins {
@@ -138,6 +142,7 @@
                        AM62AX_IOPAD(0x130, PIN_OUTPUT, 0) /* (AB17) RGMII1_TXC */
                        AM62AX_IOPAD(0x12c, PIN_OUTPUT, 0) /* (W16) RGMII1_TX_CTL */
                >;
+               bootph-all;
        };
 
        ospi0_pins_default: ospi0-default-pins {
@@ -155,6 +160,7 @@
                        AM62AX_IOPAD(0x028, PIN_INPUT, 0) /* (J22) OSPI0_D7 */
                        AM62AX_IOPAD(0x008, PIN_INPUT, 0) /* (L21) OSPI0_DQS */
                >;
+               bootph-all;
        };
 
        pmic_irq_pins_default: pmic-irq-default-pins {
@@ -168,11 +174,13 @@
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&main_rgmii1_pins_default>;
+       status = "okay";
 };
 
 &cpsw_port1 {
        phy-mode = "rgmii-rxid";
        phy-handle = <&cpsw3g_phy1>;
+       bootph-all;
 };
 
 &cpsw3g_mdio {
@@ -182,6 +190,7 @@
        cpsw3g_phy1: ethernet-phy@1 {
                compatible = "ethernet-phy-id2000.a231", "ethernet-phy-ieee802.3-c22";
                reg = <1>;
+               bootph-all;
                ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
                ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
                ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
@@ -196,6 +205,7 @@
        pinctrl-names = "default";
        pinctrl-0 = <&main_i2c0_pins_default>;
        clock-frequency = <400000>;
+       bootph-all;
        status = "okay";
 
        pmic@30 {
@@ -302,6 +312,10 @@
        status = "okay";
 };
 
+&main_pktdma {
+       bootph-all;
+};
+
 &ospi0 {
        pinctrl-names = "default";
        pinctrl-0 = <&ospi0_pins_default>;
@@ -318,6 +332,7 @@
                cdns,tchsh-ns = <60>;
                cdns,tslch-ns = <60>;
                cdns,read-delay = <0>;
+               bootph-all;
        };
 };
 
@@ -326,5 +341,6 @@
        pinctrl-0 = <&main_mmc0_pins_default>;
        disable-wp;
        non-removable;
+       bootph-all;
        status = "okay";
 };