[PR target/114085] Fix H8 constraint issue which led to ICE

Nowhere near the top of my list, but a quick looksie Sunday led to an easy to
fix backend bug.  It's not a regression, but given its the H8 backend I think
we've safely got a degree of freedom here.

The H8 has a constraint "U" which allowed both a subset of MEMs and REGs, so it
wasn't marked as a memory constraint.  LRA doesn't really handle this well -- a
pseudo which didn't get a hard reg was replaced by its MEM.  The stack slot
doesn't fit the limited addressing forms available and LRA didn't know it just
needed to reload the address into a reg.

Fixed by removing REG from the "U" constraint, turning "U" into a memory
constraint and adjusting a few patterns to allow "rU" instead of "U".

We don't really support C++ on the H8 and as a result libstdc++ won't build.
Interestingly enough that also keeps the C++ tests from working, even for a
compile-only test.  So no testcase.  Though I did check the reduced and
original test manually and ran it through my tester without any regressions.

	PR target/114085
gcc/
	* config/h8300/constraints.md (U): No longer accept REGs.
	* config/h8300/logical.md (andqi3_2): Use "rU" rather than "U".
	(andqi3_2_clobber_flags, andqi3_1, <code>qi3_1): Likewise.
	* config/h8300/testcompare.md (tst_extzv_1_n): Likewise.

diff --git a/gcc/config/h8300/constraints.md b/gcc/config/h8300/constraints.md
index 65579267359782e72014ff4bc19e921ba6f8bcc9..ba76df834a65bf71d4217d1913ed0de1efa7d214 100644 (file)
--- a/gcc/config/h8300/constraints.md
+++ b/gcc/config/h8300/constraints.md
@@ -168,13 +168,9 @@
   (and (match_code "const_int")
        (match_test "!h8300_shift_needs_scratch_p (ival, SImode, CLOBBER)")))
 
-(define_constraint "U"
+(define_memory_constraint "U"
   "An operand valid for a bset destination."
-  (ior (and (match_code "reg")
-           (match_test "(reload_in_progress || reload_completed)
-                        ? REG_OK_FOR_BASE_STRICT_P (op)
-                        : REG_OK_FOR_BASE_P (op)"))
-       (and (match_code "mem")
+  (ior (and (match_code "mem")
            (match_code "reg" "0")
            (match_test "(reload_in_progress || reload_completed)
                         ? REG_OK_FOR_BASE_STRICT_P (XEXP (op, 0))

diff --git a/gcc/config/h8300/logical.md b/gcc/config/h8300/logical.md
index 5df0922ef4e0d3f56c3d6358b7d32f13beabf15e..f848242ac87342a639520a9449acca64bf5f46d1 100644 (file)
--- a/gcc/config/h8300/logical.md
+++ b/gcc/config/h8300/logical.md
@@ -32,7 +32,7 @@
 ;; ----------------------------------------------------------------------
 
 (define_insn_and_split "*andqi3_2"
-  [(set (match_operand:QI 0 "bit_operand" "=U,rQ,r")
+  [(set (match_operand:QI 0 "bit_operand" "=rU,rQ,r")
        (and:QI (match_operand:QI 1 "bit_operand" "%0,0,WU")
                (match_operand:QI 2 "h8300_src_operand" "Y0,rQi,IP1>X")))]
   "TARGET_H8300SX"
@@ -42,7 +42,7 @@
              (clobber (reg:CC CC_REG))])])
 
 (define_insn "*andqi3_2_clobber_flags"
-  [(set (match_operand:QI 0 "bit_operand" "=U,rQ,r")
+  [(set (match_operand:QI 0 "bit_operand" "=rU,rQ,r")
        (and:QI (match_operand:QI 1 "bit_operand" "%0,0,WU")
                (match_operand:QI 2 "h8300_src_operand" "Y0,rQi,IP1>X")))
    (clobber (reg:CC CC_REG))]
@@ -55,7 +55,7 @@
    (set_attr "length_table" "*,logicb,*")])
 
 (define_insn_and_split "andqi3_1"
-  [(set (match_operand:QI 0 "bit_operand" "=U,r")
+  [(set (match_operand:QI 0 "bit_operand" "=rU,r")
        (and:QI (match_operand:QI 1 "bit_operand" "%0,0")
                (match_operand:QI 2 "h8300_src_operand" "Y0,rn")))]
   "register_operand (operands[0], QImode)
@@ -156,7 +156,7 @@
 ;; ----------------------------------------------------------------------
 
 (define_insn_and_split "<code>qi3_1"
-  [(set (match_operand:QI 0 "bit_operand" "=U,rQ")
+  [(set (match_operand:QI 0 "bit_operand" "=rU,rQ")
        (ors:QI (match_operand:QI 1 "bit_operand" "%0,0")
                (match_operand:QI 2 "h8300_src_operand" "Y2,rQi")))]
   "TARGET_H8300SX || register_operand (operands[0], QImode)

diff --git a/gcc/config/h8300/testcompare.md b/gcc/config/h8300/testcompare.md
index efa66d274c7a3b9ba2e1d841a111d923435683cf..694c9e60d4eabf4d93c69414904efa2e52b528b3 100644 (file)
--- a/gcc/config/h8300/testcompare.md
+++ b/gcc/config/h8300/testcompare.md
@@ -4,7 +4,7 @@
 
 ;; (define_insn_and_split "*tst_extzv_1_n"
 ;;   [(set (cc0)
-;;     (compare (zero_extract:SI (match_operand:QI 0 "general_operand_src" "r,U,mn>")
+;;     (compare (zero_extract:SI (match_operand:QI 0 "general_operand_src" "r,rU,mn>")
 ;;                               (const_int 1)
 ;;                               (match_operand 1 "const_int_operand" "n,n,n"))
 ;;              (const_int 0)))