]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
RISC-V: allow bseti on SImode without sign-extension
authorPhilipp Tomsich <philipp.tomsich@vrull.eu>
Mon, 10 Oct 2022 20:24:02 +0000 (22:24 +0200)
committerPhilipp Tomsich <philipp.tomsich@vrull.eu>
Fri, 18 Nov 2022 20:15:24 +0000 (21:15 +0100)
As long as the SImode operand is not a partial subreg, we can use a
bseti without postprocessing to or in a bit, as the middle end is
smart enough to stay away from the signbit.

gcc/ChangeLog:

* config/riscv/bitmanip.md (*bsetidisi): New pattern.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/zbs-bseti-02.c: New test.

gcc/config/riscv/bitmanip.md
gcc/testsuite/gcc.target/riscv/zbs-bseti-02.c [new file with mode: 0644]

index 2175c626ee5c1807f0678f481425dcaf5da78f4d..2e7142c5302199b362c4e33193a2159040e897f7 100644 (file)
   "bseti\t%0,%1,%S2"
   [(set_attr "type" "bitmanip")])
 
+;; As long as the SImode operand is not a partial subreg, we can use a
+;; bseti without postprocessing, as the middle end is smart enough to
+;; stay away from the signbit.
+(define_insn "*bsetidisi"
+  [(set (match_operand:DI 0 "register_operand" "=r")
+       (ior:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "r"))
+               (match_operand 2 "single_bit_mask_operand" "i")))]
+  "TARGET_ZBS && TARGET_64BIT
+   && !partial_subreg_p (operands[2])"
+  "bseti\t%0,%1,%S2"
+  [(set_attr "type" "bitmanip")])
+
 (define_insn "*bclr<mode>"
   [(set (match_operand:X 0 "register_operand" "=r")
        (and:X (rotate:X (const_int -2)
diff --git a/gcc/testsuite/gcc.target/riscv/zbs-bseti-02.c b/gcc/testsuite/gcc.target/riscv/zbs-bseti-02.c
new file mode 100644 (file)
index 0000000..d362994
--- /dev/null
@@ -0,0 +1,25 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc_zbs -mabi=lp64" } */
+/* { dg-skip-if "" { *-*-* } { "-O0" "-Og" } } */
+
+/* bexti */
+int f(int* a, int b)
+{
+  return ((*a << b) | (1 << 14));
+}
+
+int g(int a, int b)
+{
+  return ((a + b)| (1 << 30));
+}
+
+int h(int a, int b)
+{
+  return ((a + b)| (1ULL << 33));
+}
+
+/* { dg-final { scan-assembler-times "addw\t" 2 } } */
+/* { dg-final { scan-assembler-times "sllw\t" 1 } } */
+/* { dg-final { scan-assembler-times "bseti\t" 2 } } */
+/* { dg-final { scan-assembler-not "sext.w\t" } } */
+