+++ /dev/null
-From 8f5f525d5b83f7d76a6baf9c4e94d4bf312ea7f6 Mon Sep 17 00:00:00 2001
-From: Oliver O'Halloran <oohall@gmail.com>
-Date: Mon, 3 Apr 2017 13:25:12 +1000
-Subject: powerpc/64: Fix flush_(d|i)cache_range() called from modules
-
-From: Oliver O'Halloran <oohall@gmail.com>
-
-commit 8f5f525d5b83f7d76a6baf9c4e94d4bf312ea7f6 upstream.
-
-When the kernel is compiled to use 64bit ABIv2 the _GLOBAL() macro does
-not include a global entry point. A function's global entry point is
-used when the function is called from a different TOC context and in the
-kernel this typically means a call from a module into the vmlinux (or
-vice-versa).
-
-There are a few exported asm functions declared with _GLOBAL() and
-calling them from a module will likely crash the kernel since any TOC
-relative load will yield garbage.
-
-flush_icache_range() and flush_dcache_range() are both exported to
-modules, and use the TOC, so must use _GLOBAL_TOC().
-
-Fixes: 721aeaa9fdf3 ("powerpc: Build little endian ppc64 kernel with ABIv2")
-Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
-Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-
-
----
- arch/powerpc/kernel/misc_64.S | 5 ++++-
- 1 file changed, 4 insertions(+), 1 deletion(-)
-
---- a/arch/powerpc/kernel/misc_64.S
-+++ b/arch/powerpc/kernel/misc_64.S
-@@ -66,6 +66,9 @@ PPC64_CACHES:
- */
-
- _KPROBE(flush_icache_range)
-+0: addis r2,r12,(.TOC. - 0b)@ha
-+ addi r2, r2,(.TOC. - 0b)@l
-+ .localentry flush_icache_range, . - flush_icache_range
- BEGIN_FTR_SECTION
- PURGE_PREFETCHED_INS
- blr
-@@ -116,7 +119,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_I
- *
- * flush all bytes from start to stop-1 inclusive
- */
--_GLOBAL(flush_dcache_range)
-+_GLOBAL_TOC(flush_dcache_range)
-
- /*
- * Flush the data cache to memory
powerpc-kprobe-fix-oops-when-kprobed-on-stdu-instruction.patch
x86-mce-amd-give-a-name-to-mca-bank-3-when-accessed-with-legacy-msrs.patch
kvm-arm-arm64-fix-locking-for-kvm_free_stage2_pgd.patch
-powerpc-64-fix-flush_-d-i-cache_range-called-from-modules.patch
-x86-pmem-fix-broken-__copy_user_nocache-cache-bypass-assumptions.patch
+++ /dev/null
-From 11e63f6d920d6f2dfd3cd421e939a4aec9a58dcd Mon Sep 17 00:00:00 2001
-From: Dan Williams <dan.j.williams@intel.com>
-Date: Thu, 6 Apr 2017 09:04:31 -0700
-Subject: x86, pmem: fix broken __copy_user_nocache cache-bypass assumptions
-
-From: Dan Williams <dan.j.williams@intel.com>
-
-commit 11e63f6d920d6f2dfd3cd421e939a4aec9a58dcd upstream.
-
-Before we rework the "pmem api" to stop abusing __copy_user_nocache()
-for memcpy_to_pmem() we need to fix cases where we may strand dirty data
-in the cpu cache. The problem occurs when copy_from_iter_pmem() is used
-for arbitrary data transfers from userspace. There is no guarantee that
-these transfers, performed by dax_iomap_actor(), will have aligned
-destinations or aligned transfer lengths. Backstop the usage
-__copy_user_nocache() with explicit cache management in these unaligned
-cases.
-
-Yes, copy_from_iter_pmem() is now too big for an inline, but addressing
-that is saved for a later patch that moves the entirety of the "pmem
-api" into the pmem driver directly.
-
-Fixes: 5de490daec8b ("pmem: add copy_from_iter_pmem() and clear_pmem()")
-Cc: <x86@kernel.org>
-Cc: Jan Kara <jack@suse.cz>
-Cc: Jeff Moyer <jmoyer@redhat.com>
-Cc: Ingo Molnar <mingo@redhat.com>
-Cc: Christoph Hellwig <hch@lst.de>
-Cc: "H. Peter Anvin" <hpa@zytor.com>
-Cc: Al Viro <viro@zeniv.linux.org.uk>
-Cc: Thomas Gleixner <tglx@linutronix.de>
-Cc: Matthew Wilcox <mawilcox@microsoft.com>
-Reviewed-by: Ross Zwisler <ross.zwisler@linux.intel.com>
-Signed-off-by: Toshi Kani <toshi.kani@hpe.com>
-Signed-off-by: Dan Williams <dan.j.williams@intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-
-diff --git a/arch/x86/include/asm/pmem.h b/arch/x86/include/asm/pmem.h
-index 2c1ebeb4d737..529bb4a6487a 100644
---- a/arch/x86/include/asm/pmem.h
-+++ b/arch/x86/include/asm/pmem.h
-@@ -55,7 +55,8 @@ static inline int arch_memcpy_from_pmem(void *dst, const void *src, size_t n)
- * @size: number of bytes to write back
- *
- * Write back a cache range using the CLWB (cache line write back)
-- * instruction.
-+ * instruction. Note that @size is internally rounded up to be cache
-+ * line size aligned.
- */
- static inline void arch_wb_cache_pmem(void *addr, size_t size)
- {
-@@ -69,15 +70,6 @@ static inline void arch_wb_cache_pmem(void *addr, size_t size)
- clwb(p);
- }
-
--/*
-- * copy_from_iter_nocache() on x86 only uses non-temporal stores for iovec
-- * iterators, so for other types (bvec & kvec) we must do a cache write-back.
-- */
--static inline bool __iter_needs_pmem_wb(struct iov_iter *i)
--{
-- return iter_is_iovec(i) == false;
--}
--
- /**
- * arch_copy_from_iter_pmem - copy data from an iterator to PMEM
- * @addr: PMEM destination address
-@@ -94,7 +86,35 @@ static inline size_t arch_copy_from_iter_pmem(void *addr, size_t bytes,
- /* TODO: skip the write-back by always using non-temporal stores */
- len = copy_from_iter_nocache(addr, bytes, i);
-
-- if (__iter_needs_pmem_wb(i))
-+ /*
-+ * In the iovec case on x86_64 copy_from_iter_nocache() uses
-+ * non-temporal stores for the bulk of the transfer, but we need
-+ * to manually flush if the transfer is unaligned. A cached
-+ * memory copy is used when destination or size is not naturally
-+ * aligned. That is:
-+ * - Require 8-byte alignment when size is 8 bytes or larger.
-+ * - Require 4-byte alignment when size is 4 bytes.
-+ *
-+ * In the non-iovec case the entire destination needs to be
-+ * flushed.
-+ */
-+ if (iter_is_iovec(i)) {
-+ unsigned long flushed, dest = (unsigned long) addr;
-+
-+ if (bytes < 8) {
-+ if (!IS_ALIGNED(dest, 4) || (bytes != 4))
-+ arch_wb_cache_pmem(addr, 1);
-+ } else {
-+ if (!IS_ALIGNED(dest, 8)) {
-+ dest = ALIGN(dest, boot_cpu_data.x86_clflush_size);
-+ arch_wb_cache_pmem(addr, 1);
-+ }
-+
-+ flushed = dest - (unsigned long) addr;
-+ if (bytes > flushed && !IS_ALIGNED(bytes - flushed, 8))
-+ arch_wb_cache_pmem(addr + bytes - 1, 1);
-+ }
-+ } else
- arch_wb_cache_pmem(addr, bytes);
-
- return len;
+++ /dev/null
-From 8f5f525d5b83f7d76a6baf9c4e94d4bf312ea7f6 Mon Sep 17 00:00:00 2001
-From: Oliver O'Halloran <oohall@gmail.com>
-Date: Mon, 3 Apr 2017 13:25:12 +1000
-Subject: powerpc/64: Fix flush_(d|i)cache_range() called from modules
-
-From: Oliver O'Halloran <oohall@gmail.com>
-
-commit 8f5f525d5b83f7d76a6baf9c4e94d4bf312ea7f6 upstream.
-
-When the kernel is compiled to use 64bit ABIv2 the _GLOBAL() macro does
-not include a global entry point. A function's global entry point is
-used when the function is called from a different TOC context and in the
-kernel this typically means a call from a module into the vmlinux (or
-vice-versa).
-
-There are a few exported asm functions declared with _GLOBAL() and
-calling them from a module will likely crash the kernel since any TOC
-relative load will yield garbage.
-
-flush_icache_range() and flush_dcache_range() are both exported to
-modules, and use the TOC, so must use _GLOBAL_TOC().
-
-Fixes: 721aeaa9fdf3 ("powerpc: Build little endian ppc64 kernel with ABIv2")
-Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
-Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-
-
----
- arch/powerpc/kernel/misc_64.S | 5 ++++-
- 1 file changed, 4 insertions(+), 1 deletion(-)
-
---- a/arch/powerpc/kernel/misc_64.S
-+++ b/arch/powerpc/kernel/misc_64.S
-@@ -67,6 +67,9 @@ PPC64_CACHES:
- */
-
- _KPROBE(flush_icache_range)
-+0: addis r2,r12,(.TOC. - 0b)@ha
-+ addi r2, r2,(.TOC. - 0b)@l
-+ .localentry flush_icache_range, . - flush_icache_range
- BEGIN_FTR_SECTION
- PURGE_PREFETCHED_INS
- blr
-@@ -117,7 +120,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_I
- *
- * flush all bytes from start to stop-1 inclusive
- */
--_GLOBAL(flush_dcache_range)
-+_GLOBAL_TOC(flush_dcache_range)
-
- /*
- * Flush the data cache to memory
powerpc-kprobe-fix-oops-when-kprobed-on-stdu-instruction.patch
x86-mce-amd-give-a-name-to-mca-bank-3-when-accessed-with-legacy-msrs.patch
kvm-arm-arm64-fix-locking-for-kvm_free_stage2_pgd.patch
-powerpc-64-fix-flush_-d-i-cache_range-called-from-modules.patch
tools-hv-kvp-ensure-kvp-device-fd-is-closed-on-exec.patch
drivers-hv-balloon-keep-track-of-where-ha_region-starts.patch
drivers-hv-balloon-account-for-gaps-in-hot-add-regions.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
