]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
x86/CPU/AMD: Add X86_FEATURE_ZEN6
authorYazen Ghannam <yazen.ghannam@amd.com>
Tue, 13 May 2025 20:48:57 +0000 (20:48 +0000)
committerBorislav Petkov (AMD) <bp@alien8.de>
Tue, 13 May 2025 20:59:11 +0000 (22:59 +0200)
Add a synthetic feature flag for Zen6.

  [  bp: Move the feature flag to a free slot and avoid future merge
     conflicts from incoming stuff. ]

Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/20250513204857.3376577-1-yazen.ghannam@amd.com
arch/x86/include/asm/cpufeatures.h
arch/x86/kernel/cpu/amd.c

index 6c2c152d8a67b9bf5836d4fe4860476684f282ff..9bb17c714f4ae7f7fbb3af7a1bb2181cdd463512 100644 (file)
@@ -75,7 +75,7 @@
 #define X86_FEATURE_CENTAUR_MCR                ( 3*32+ 3) /* "centaur_mcr" Centaur MCRs (= MTRRs) */
 #define X86_FEATURE_K8                 ( 3*32+ 4) /* Opteron, Athlon64 */
 #define X86_FEATURE_ZEN5               ( 3*32+ 5) /* CPU based on Zen5 microarchitecture */
-/* Free                                 ( 3*32+ 6) */
+#define X86_FEATURE_ZEN6               ( 3*32+ 6) /* CPU based on Zen6 microarchitecture */
 /* Free                                 ( 3*32+ 7) */
 #define X86_FEATURE_CONSTANT_TSC       ( 3*32+ 8) /* "constant_tsc" TSC ticks at a constant rate */
 #define X86_FEATURE_UP                 ( 3*32+ 9) /* "up" SMP kernel running on UP */
index 2b36379ff675dc9b4fbca5f73dd183cb3bc93340..4e06baab40bb3f1c8fe4cd00a82979ead13c3dc2 100644 (file)
@@ -472,6 +472,11 @@ static void bsp_init_amd(struct cpuinfo_x86 *c)
                case 0x60 ... 0x7f:
                        setup_force_cpu_cap(X86_FEATURE_ZEN5);
                        break;
+               case 0x50 ... 0x5f:
+               case 0x90 ... 0xaf:
+               case 0xc0 ... 0xcf:
+                       setup_force_cpu_cap(X86_FEATURE_ZEN6);
+                       break;
                default:
                        goto warn;
                }