RISC-V: Test memcpy inlined on riscv_v

Since r14-4358-g9464e72bcc9 riscv_v targets use vector instructions to
perform a memcpy. We no longer expect memcpy for riscv_v targets.

gcc/testsuite/ChangeLog:

	* gcc.dg/pr90263.c: Skip riscv_v targets.
	* gcc.target/riscv/rvv/base/pr90263.c: New test.

Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
Co-authored-by: Joern Rennecke <joern.rennecke@embecosm.com>

diff --git a/gcc/testsuite/gcc.dg/pr90263.c b/gcc/testsuite/gcc.dg/pr90263.c
index 3222a5331c162a75fd4d91000bb75004a7eac9ef..831e098783befdf976ca390d18984e6c3208f41a 100644 (file)
--- a/gcc/testsuite/gcc.dg/pr90263.c
+++ b/gcc/testsuite/gcc.dg/pr90263.c
@@ -2,6 +2,7 @@
 /* { dg-do compile } */
 /* { dg-options "-O2" } */
 /* { dg-require-effective-target glibc } */
+/* { dg-skip-if "riscv_v uses an inline memcpy routine" { riscv_v } }*/
 
 int *f (int *p, int *q, long n)
 {

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr90263.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pr90263.c
new file mode 100644 (file)
index 0000000..7308428
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr90263.c
@@ -0,0 +1,7 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+/* { dg-require-effective-target glibc } */
+
+#include "../../../../gcc.dg/pr90263.c"
+
+/* { dg-final { scan-assembler-not "memcpy" { target { riscv_v } } } } */