]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
clk: sunxi-ng: mp: Fix dual-divider clock rate readback
authorChen-Yu Tsai <wens@csie.org>
Sat, 30 Aug 2025 17:08:56 +0000 (01:08 +0800)
committerChen-Yu Tsai <wens@csie.org>
Wed, 10 Sep 2025 15:45:48 +0000 (23:45 +0800)
When dual-divider clock support was introduced, the P divider offset was
left out of the .recalc_rate readback function. This causes the clock
rate to become bogus or even zero (possibly due to the P divider being
1, leading to a divide-by-zero).

Fix this by incorporating the P divider offset into the calculation.

Fixes: 45717804b75e ("clk: sunxi-ng: mp: introduce dual-divider clock")
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Link: https://patch.msgid.link/20250830170901.1996227-4-wens@kernel.org
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
drivers/clk/sunxi-ng/ccu_mp.c

index 354c981943b6f806e0c3534e31775e31a9ceca2b..4221b1888b38da22c16c90796abe6ffab9dc6291 100644 (file)
@@ -185,7 +185,7 @@ static unsigned long ccu_mp_recalc_rate(struct clk_hw *hw,
        p &= (1 << cmp->p.width) - 1;
 
        if (cmp->common.features & CCU_FEATURE_DUAL_DIV)
-               rate = (parent_rate / p) / m;
+               rate = (parent_rate / (p + cmp->p.offset)) / m;
        else
                rate = (parent_rate >> p) / m;