cxl/events: Promote CXL event structures to a core header

UEFI code can process CXL events through CPER records.  Those records
use almost the same format as the CXL events.

Lift the CXL event structures to a core header to be shared in later
patches.

[jic123: drop "CXL rev 3.0" mention]

Signed-off-by: Ira Weiny <ira.weiny@intel.com>
Link: https://lore.kernel.org/r/20231220-cxl-cper-v5-2-1bb8a4ca2c7a@intel.com
[djbw: add F: entry to maintainers for include/linux/cxl-event.h]
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>

diff --git a/MAINTAINERS b/MAINTAINERS
index 7cef2d2ef8d708bd56113360e5696e3c17535302..04f6c52d0a8f1197bc6b9ce3159c96c30f86a8cb 100644 (file)
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -5245,6 +5245,7 @@ M:        Dan Williams <dan.j.williams@intel.com>
 L:     linux-cxl@vger.kernel.org
 S:     Maintained
 F:     drivers/cxl/
+F:     include/linux/cxl-event.h
 F:     include/uapi/linux/cxl_mem.h
 F:     tools/testing/cxl/
 

diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h
index a2fcbca253f3983a6c4bfb1b2f964314e1b250d6..f0e7ebb84f028d146b566c5af814e0cb6cbb327a 100644 (file)
--- a/drivers/cxl/cxlmem.h
+++ b/drivers/cxl/cxlmem.h
@@ -6,6 +6,7 @@
 #include <linux/cdev.h>
 #include <linux/uuid.h>
 #include <linux/rcuwait.h>
+#include <linux/cxl-event.h>
 #include "cxl.h"
 
 /* CXL 2.0 8.2.8.5.1.1 Memory Device Status Register */
@@ -579,27 +580,6 @@ struct cxl_mbox_identify {
        u8 qos_telemetry_caps;
 } __packed;
 
-/*
- * Common Event Record Format
- * CXL rev 3.0 section 8.2.9.2.1; Table 8-42
- */
-struct cxl_event_record_hdr {
-       uuid_t id;
-       u8 length;
-       u8 flags[3];
-       __le16 handle;
-       __le16 related_handle;
-       __le64 timestamp;
-       u8 maint_op_class;
-       u8 reserved[15];
-} __packed;
-
-#define CXL_EVENT_RECORD_DATA_LENGTH 0x50
-struct cxl_event_record_raw {
-       struct cxl_event_record_hdr hdr;
-       u8 data[CXL_EVENT_RECORD_DATA_LENGTH];
-} __packed;
-
 /*
  * Get Event Records output payload
  * CXL rev 3.0 section 8.2.9.2.2; Table 8-50
@@ -641,74 +621,6 @@ struct cxl_mbox_clear_event_payload {
 } __packed;
 #define CXL_CLEAR_EVENT_MAX_HANDLES U8_MAX
 
-/*
- * General Media Event Record
- * CXL rev 3.0 Section 8.2.9.2.1.1; Table 8-43
- */
-#define CXL_EVENT_GEN_MED_COMP_ID_SIZE 0x10
-struct cxl_event_gen_media {
-       struct cxl_event_record_hdr hdr;
-       __le64 phys_addr;
-       u8 descriptor;
-       u8 type;
-       u8 transaction_type;
-       u8 validity_flags[2];
-       u8 channel;
-       u8 rank;
-       u8 device[3];
-       u8 component_id[CXL_EVENT_GEN_MED_COMP_ID_SIZE];
-       u8 reserved[46];
-} __packed;
-
-/*
- * DRAM Event Record - DER
- * CXL rev 3.0 section 8.2.9.2.1.2; Table 3-44
- */
-#define CXL_EVENT_DER_CORRECTION_MASK_SIZE     0x20
-struct cxl_event_dram {
-       struct cxl_event_record_hdr hdr;
-       __le64 phys_addr;
-       u8 descriptor;
-       u8 type;
-       u8 transaction_type;
-       u8 validity_flags[2];
-       u8 channel;
-       u8 rank;
-       u8 nibble_mask[3];
-       u8 bank_group;
-       u8 bank;
-       u8 row[3];
-       u8 column[2];
-       u8 correction_mask[CXL_EVENT_DER_CORRECTION_MASK_SIZE];
-       u8 reserved[0x17];
-} __packed;
-
-/*
- * Get Health Info Record
- * CXL rev 3.0 section 8.2.9.8.3.1; Table 8-100
- */
-struct cxl_get_health_info {
-       u8 health_status;
-       u8 media_status;
-       u8 add_status;
-       u8 life_used;
-       u8 device_temp[2];
-       u8 dirty_shutdown_cnt[4];
-       u8 cor_vol_err_cnt[4];
-       u8 cor_per_err_cnt[4];
-} __packed;
-
-/*
- * Memory Module Event Record
- * CXL rev 3.0 section 8.2.9.2.1.3; Table 8-45
- */
-struct cxl_event_mem_module {
-       struct cxl_event_record_hdr hdr;
-       u8 event_type;
-       struct cxl_get_health_info info;
-       u8 reserved[0x3d];
-} __packed;
-
 struct cxl_mbox_get_partition_info {
        __le64 active_volatile_cap;
        __le64 active_persistent_cap;

diff --git a/include/linux/cxl-event.h b/include/linux/cxl-event.h
new file mode 100644 (file)
index 0000000..0fc0681
--- /dev/null
+++ b/include/linux/cxl-event.h
@@ -0,0 +1,95 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Copyright(c) 2023 Intel Corporation. */
+#ifndef _LINUX_CXL_EVENT_H
+#define _LINUX_CXL_EVENT_H
+
+/*
+ * Common Event Record Format
+ * CXL rev 3.0 section 8.2.9.2.1; Table 8-42
+ */
+struct cxl_event_record_hdr {
+       uuid_t id;
+       u8 length;
+       u8 flags[3];
+       __le16 handle;
+       __le16 related_handle;
+       __le64 timestamp;
+       u8 maint_op_class;
+       u8 reserved[15];
+} __packed;
+
+#define CXL_EVENT_RECORD_DATA_LENGTH 0x50
+struct cxl_event_record_raw {
+       struct cxl_event_record_hdr hdr;
+       u8 data[CXL_EVENT_RECORD_DATA_LENGTH];
+} __packed;
+
+/*
+ * General Media Event Record
+ * CXL rev 3.0 Section 8.2.9.2.1.1; Table 8-43
+ */
+#define CXL_EVENT_GEN_MED_COMP_ID_SIZE 0x10
+struct cxl_event_gen_media {
+       struct cxl_event_record_hdr hdr;
+       __le64 phys_addr;
+       u8 descriptor;
+       u8 type;
+       u8 transaction_type;
+       u8 validity_flags[2];
+       u8 channel;
+       u8 rank;
+       u8 device[3];
+       u8 component_id[CXL_EVENT_GEN_MED_COMP_ID_SIZE];
+       u8 reserved[46];
+} __packed;
+
+/*
+ * DRAM Event Record - DER
+ * CXL rev 3.0 section 8.2.9.2.1.2; Table 3-44
+ */
+#define CXL_EVENT_DER_CORRECTION_MASK_SIZE     0x20
+struct cxl_event_dram {
+       struct cxl_event_record_hdr hdr;
+       __le64 phys_addr;
+       u8 descriptor;
+       u8 type;
+       u8 transaction_type;
+       u8 validity_flags[2];
+       u8 channel;
+       u8 rank;
+       u8 nibble_mask[3];
+       u8 bank_group;
+       u8 bank;
+       u8 row[3];
+       u8 column[2];
+       u8 correction_mask[CXL_EVENT_DER_CORRECTION_MASK_SIZE];
+       u8 reserved[0x17];
+} __packed;
+
+/*
+ * Get Health Info Record
+ * CXL rev 3.0 section 8.2.9.8.3.1; Table 8-100
+ */
+struct cxl_get_health_info {
+       u8 health_status;
+       u8 media_status;
+       u8 add_status;
+       u8 life_used;
+       u8 device_temp[2];
+       u8 dirty_shutdown_cnt[4];
+       u8 cor_vol_err_cnt[4];
+       u8 cor_per_err_cnt[4];
+} __packed;
+
+/*
+ * Memory Module Event Record
+ * CXL rev 3.0 section 8.2.9.2.1.3; Table 8-45
+ */
+struct cxl_event_mem_module {
+       struct cxl_event_record_hdr hdr;
+       u8 event_type;
+       struct cxl_get_health_info info;
+       u8 reserved[0x3d];
+} __packed;
+
+#endif /* _LINUX_CXL_EVENT_H */