]> git.ipfire.org Git - thirdparty/kernel/stable-queue.git/commitdiff
pending 4.4/4.9 patch added
authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 22 Feb 2021 18:13:48 +0000 (19:13 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 22 Feb 2021 18:13:48 +0000 (19:13 +0100)
pending/revert-iio-hi8435-cleanup-reset-gpio.patch [new file with mode: 0644]

diff --git a/pending/revert-iio-hi8435-cleanup-reset-gpio.patch b/pending/revert-iio-hi8435-cleanup-reset-gpio.patch
new file mode 100644 (file)
index 0000000..4991b3a
--- /dev/null
@@ -0,0 +1,44 @@
+From e18788afebd12a53b3e173d5b1390a785346da2e Mon Sep 17 00:00:00 2001
+From: Jonathan Cameron <jic23@kernel.org>
+Date: Sun, 28 May 2017 16:10:21 +0100
+Subject: Revert "iio: hi8435: cleanup reset gpio"
+
+From: Jonathan Cameron <jic23@kernel.org>
+
+commit e18788afebd12a53b3e173d5b1390a785346da2e upstream.
+
+This reverts commit 61305664a542f874283f74bf0b27ddb31f5045d7.
+
+This commit was applied prematurely and will break some existing
+situations where the signal is inverted as part of voltage level
+conversions.
+
+Signed-off-by: Jonathan Cameron <jic23@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/iio/adc/hi8435.c |   12 +++++-------
+ 1 file changed, 5 insertions(+), 7 deletions(-)
+
+--- a/drivers/iio/adc/hi8435.c
++++ b/drivers/iio/adc/hi8435.c
+@@ -453,15 +453,13 @@ static int hi8435_probe(struct spi_devic
+       priv->spi = spi;
+       reset_gpio = devm_gpiod_get(&spi->dev, NULL, GPIOD_OUT_LOW);
+-      if (!IS_ERR(reset_gpio)) {
+-              /* need >=100ns low pulse to reset chip */
+-              gpiod_set_raw_value_cansleep(reset_gpio, 0);
+-              udelay(1);
+-              gpiod_set_raw_value_cansleep(reset_gpio, 1);
+-      } else {
+-              /* s/w reset chip if h/w reset is not available */
++      if (IS_ERR(reset_gpio)) {
++              /* chip s/w reset if h/w reset failed */
+               hi8435_writeb(priv, HI8435_CTRL_REG, HI8435_CTRL_SRST);
+               hi8435_writeb(priv, HI8435_CTRL_REG, 0);
++      } else {
++              udelay(5);
++              gpiod_set_value(reset_gpio, 1);
+       }
+       spi_set_drvdata(spi, idev);