]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
ARM: davinci: switch to common clock framework
authorDavid Lechner <david@lechnology.com>
Fri, 18 May 2018 16:48:17 +0000 (11:48 -0500)
committerSekhar Nori <nsekhar@ti.com>
Tue, 26 Jun 2018 10:24:43 +0000 (15:54 +0530)
This switches ARCH_DAVINCI to use the common clock framework. The legacy
clock code in arch/arm/mach-davinci/ is no longer used. New drivers in
drivers/clk/davinci/ are used instead.

A few macros had to be moved to prevent compilation errors.

Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
arch/arm/Kconfig
arch/arm/mach-davinci/Makefile
arch/arm/mach-davinci/clock.h
arch/arm/mach-davinci/davinci.h
arch/arm/mach-davinci/psc.h

index 54eeb8d00bc62a9f818aa9a833cbc15e7a1d9324..3d7b0fee739d8e136f1aee2328a39f8906d9e5b0 100644 (file)
@@ -606,13 +606,16 @@ config ARCH_S3C24XX
 config ARCH_DAVINCI
        bool "TI DaVinci"
        select ARCH_HAS_HOLES_MEMORYMODEL
-       select CLKDEV_LOOKUP
+       select COMMON_CLK
        select CPU_ARM926T
        select GENERIC_ALLOCATOR
        select GENERIC_CLOCKEVENTS
        select GENERIC_IRQ_CHIP
        select GPIOLIB
        select HAVE_IDE
+       select PM_GENERIC_DOMAINS if PM
+       select PM_GENERIC_DOMAINS_OF if PM && OF
+       select RESET_CONTROLLER
        select USE_OF
        select ZONE_DMA
        help
index 4e8178050027458779f6685e921d8953c33a0891..8725d8bea567a34d1db655655dbd9bdc5e016420 100644 (file)
@@ -5,8 +5,8 @@
 #
 
 # Common objects
-obj-y                  := time.o clock.o serial.o psc.o \
-                          usb.o common.o sram.o aemif.o
+obj-y                                  := time.o serial.o usb.o \
+                                          common.o sram.o aemif.o
 
 obj-$(CONFIG_DAVINCI_MUX)              += mux.o
 
index d7894d5aaa250b027d4f035369b0d3b2ec08efd2..2d058568e0049aab2b75f53d6ce493adc45dc907 100644 (file)
 #ifndef __ARCH_ARM_DAVINCI_CLOCK_H
 #define __ARCH_ARM_DAVINCI_CLOCK_H
 
-#define DAVINCI_PLL1_BASE 0x01c40800
-#define DAVINCI_PLL2_BASE 0x01c40c00
-#define MAX_PLL 2
-
 /* PLL/Reset register offsets */
 #define PLLCTL          0x100
 #define PLLCTL_PLLEN    BIT(0)
index fa99197d36f9b675b9c6e644824a58419cc7475f..db4c95ef4d5c59302a407b7a287a4ece098e7de6 100644 (file)
 #include <media/davinci/vpbe.h>
 #include <media/davinci/vpbe_osd.h>
 
+#define DAVINCI_PLL1_BASE              0x01c40800
+#define DAVINCI_PLL2_BASE              0x01c40c00
+#define DAVINCI_PWR_SLEEP_CNTRL_BASE   0x01c41000
+
 #define DAVINCI_SYSTEM_MODULE_BASE     0x01c40000
 #define SYSMOD_VDAC_CONFIG             0x2c
 #define SYSMOD_VIDCLKCTL               0x38
index 8af9f09fc10ce1dcab351389c77c706e86520cc4..b58707cf70333e46ea4308b05b33e0ace9d80205 100644 (file)
@@ -27,8 +27,6 @@
 #ifndef __ASM_ARCH_PSC_H
 #define __ASM_ARCH_PSC_H
 
-#define        DAVINCI_PWR_SLEEP_CNTRL_BASE    0x01C41000
-
 /* Power and Sleep Controller (PSC) Domains */
 #define DAVINCI_GPSC_ARMDOMAIN         0
 #define DAVINCI_GPSC_DSPDOMAIN         1