]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
cxl/hdm: Use guard() in cxl_dpa_set_mode()
authorIra Weiny <ira.weiny@intel.com>
Thu, 7 Nov 2024 20:58:23 +0000 (14:58 -0600)
committerDave Jiang <dave.jiang@intel.com>
Fri, 8 Nov 2024 16:39:31 +0000 (09:39 -0700)
Additional DCD functionality is being added to this call which will be
simplified by the use of guard() with the cxl_dpa_rwsem.

Convert the function to use guard() prior to adding DCD functionality.

Suggested-by: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Davidlohr Bueso <dave@stgolabs.net>
Signed-off-by: Ira Weiny <ira.weiny@intel.com>
Link: https://patch.msgid.link/20241107-dcd-type2-upstream-v7-5-56a84e66bc36@intel.com
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
drivers/cxl/core/hdm.c

index 3df10517a3278f228c7535fcbdb607d7b75bc879..463ba2669cea55194e2be2c26d02af75dde8d145 100644 (file)
@@ -424,7 +424,6 @@ int cxl_dpa_set_mode(struct cxl_endpoint_decoder *cxled,
        struct cxl_memdev *cxlmd = cxled_to_memdev(cxled);
        struct cxl_dev_state *cxlds = cxlmd->cxlds;
        struct device *dev = &cxled->cxld.dev;
-       int rc;
 
        switch (mode) {
        case CXL_DECODER_RAM:
@@ -435,11 +434,9 @@ int cxl_dpa_set_mode(struct cxl_endpoint_decoder *cxled,
                return -EINVAL;
        }
 
-       down_write(&cxl_dpa_rwsem);
-       if (cxled->cxld.flags & CXL_DECODER_F_ENABLE) {
-               rc = -EBUSY;
-               goto out;
-       }
+       guard(rwsem_write)(&cxl_dpa_rwsem);
+       if (cxled->cxld.flags & CXL_DECODER_F_ENABLE)
+               return -EBUSY;
 
        /*
         * Only allow modes that are supported by the current partition
@@ -447,21 +444,15 @@ int cxl_dpa_set_mode(struct cxl_endpoint_decoder *cxled,
         */
        if (mode == CXL_DECODER_PMEM && !resource_size(&cxlds->pmem_res)) {
                dev_dbg(dev, "no available pmem capacity\n");
-               rc = -ENXIO;
-               goto out;
+               return -ENXIO;
        }
        if (mode == CXL_DECODER_RAM && !resource_size(&cxlds->ram_res)) {
                dev_dbg(dev, "no available ram capacity\n");
-               rc = -ENXIO;
-               goto out;
+               return -ENXIO;
        }
 
        cxled->mode = mode;
-       rc = 0;
-out:
-       up_write(&cxl_dpa_rwsem);
-
-       return rc;
+       return 0;
 }
 
 int cxl_dpa_alloc(struct cxl_endpoint_decoder *cxled, unsigned long long size)