Basic support for Intel Core i7

	* i386.c (ix86_option_override_internal): Add entry for corei7, use
	generic tuning.  Use generic32 when compiling for 32-bit ABI.

Co-Authored-By: H.J. Lu <hjl.tools@gmail.com>
Co-Authored-By: Maxim Kuvyrkov <maxim@codesourcery.com>
From-SVN: r166176

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a94206d9816c79b025501ec3882911f12c7590e9..b97cf78b4a736ac26bed0cafbfce412766e00242 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2010-11-02  Bernd Schmidt  <bernds@codesourcery.com>
+           Maxim Kuvyrkov  <maxim@codesourcery.com>
+           H.J. Lu  <hjl.tools@gmail.com>
+
+       Basic support for Intel Core i7
+
+       * i386.c (ix86_option_override_internal): Add entry for corei7, use
+       generic tuning.  Use generic32 when compiling for 32-bit ABI.
+
 2010-11-02  Iain Sandoe  <iains@gcc.gnu.org>
 
        * config/darwin.c (darwin_asm_named_section): Check for __DWARF

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 32d6371a1337ea743397b7fbab0a1dc5d3eda9d2..47c3bfe80d978d947413eb0f7b341a57a37feefc 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -3183,6 +3183,9 @@ ix86_option_override_internal (bool main_args_p)
       {"core2", PROCESSOR_CORE2, CPU_CORE2,
        PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3
        | PTA_SSSE3 | PTA_CX16},
+      {"corei7", PROCESSOR_GENERIC64, CPU_GENERIC64,
+       PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3
+       | PTA_SSSE3 | PTA_SSE4_1 | PTA_SSE4_2 | PTA_CX16},
       {"atom", PROCESSOR_ATOM, CPU_ATOM,
        PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3
        | PTA_SSSE3 | PTA_CX16 | PTA_MOVBE},
@@ -3522,23 +3525,40 @@ ix86_option_override_internal (bool main_args_p)
       {
        ix86_schedule = processor_alias_table[i].schedule;
        ix86_tune = processor_alias_table[i].processor;
-       if (TARGET_64BIT && !(processor_alias_table[i].flags & PTA_64BIT))
+       if (TARGET_64BIT)
          {
-           if (ix86_tune_defaulted)
+           if (!(processor_alias_table[i].flags & PTA_64BIT))
              {
-               ix86_tune_string = "x86-64";
-               for (i = 0; i < pta_size; i++)
-                 if (! strcmp (ix86_tune_string,
-                               processor_alias_table[i].name))
-                   break;
-               ix86_schedule = processor_alias_table[i].schedule;
-               ix86_tune = processor_alias_table[i].processor;
+               if (ix86_tune_defaulted)
+                 {
+                   ix86_tune_string = "x86-64";
+                   for (i = 0; i < pta_size; i++)
+                     if (! strcmp (ix86_tune_string,
+                                   processor_alias_table[i].name))
+                       break;
+                   ix86_schedule = processor_alias_table[i].schedule;
+                   ix86_tune = processor_alias_table[i].processor;
+                 }
+               else
+                 error ("CPU you selected does not support x86-64 "
+                        "instruction set");
+             }
+         }
+       else
+         {
+           /* Adjust tuning when compiling for 32-bit ABI.  */
+           switch (ix86_tune)
+             {
+             case PROCESSOR_GENERIC64:
+               ix86_tune = PROCESSOR_GENERIC32;
+               ix86_schedule = CPU_PENTIUMPRO;
+               break;
+
+             default:
+               break;
              }
-           else
-             error ("CPU you selected does not support x86-64 "
-                    "instruction set");
          }
-        /* Intel CPUs have always interpreted SSE prefetch instructions as
+       /* Intel CPUs have always interpreted SSE prefetch instructions as
           NOPs; so, we can enable SSE prefetch instructions even when
           -mtune (rather than -march) points us to a processor that has them.
           However, the VIA C3 gives a SIGILL, so we only do that for i686 and