]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/amd/display: Fetch Mall caps from DC
authorDaniel Sa <daniel.sa@amd.com>
Thu, 16 May 2024 16:03:34 +0000 (12:03 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 5 Jun 2024 15:25:14 +0000 (11:25 -0400)
[Why]
When performing P-State switching with Subvp on 8k (downscaled to 4k).
corruption can be seen on the screen. MALL data was not being fetched
from DC, and the system things there is more MALL space then what is
actually available.

[How]
Read MALL size from dc caps.

Reviewed-by: Dillon Varone <dillon.varone@amd.com>
Acked-by: Zaeem Mohamed <zaeem.mohamed@amd.com>
Signed-off-by: Daniel Sa <daniel.sa@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

index 9f641ffdc924fbcc95f1a13aaf5c4b9121686e5a..a7d02da16bb593a6fd372c2731e0f451ed8a5703 100644 (file)
@@ -306,7 +306,7 @@ void dml21_apply_soc_bb_overrides(struct dml2_initialize_instance_in_out *dml_in
 
        if (in_dc->ctx->dc_bios->vram_info.num_chans) {
                dml_clk_table->dram_config.channel_count = in_dc->ctx->dc_bios->vram_info.num_chans;
-               //dml_soc_bb->mall_allocated_for_dcn_mbytes = TODO;
+               dml_soc_bb->mall_allocated_for_dcn_mbytes = in_dc->caps.mall_size_total / 1048576;
        }
 
        if (in_dc->ctx->dc_bios->vram_info.dram_channel_width_bytes) {