The azx_bus->dma_type is referred only for allocating the
communication buffers like CORB/RIRB, and the allocation size is
small. Hence it doesn't have to be S/G buffer allocation, which is an
obvious overkill. Use the standard SNDRV_DMA_TYPE_DEV_WC instead.
This was changed to SNDRV_DMA_TYPE_DEV_WC_SG in the commit
37137ec26c2c ("ALSA: hda: Once again fix regression of page
allocations with IOMMU") as a workaround for IOMMU-backed
allocations. But this is no longer needed since the allocation with
SNDRV_DMA_TYPE_DEV_WC itself was fixed in the commit
9c27301342a5
("ALSA: memalloc: Use DMA API for x86 WC page allocations, too").
So this patch reverts the previous workaround in this piece of code.
Link: https://patch.msgid.link/20240909134744.25426-1-tiwai@suse.de
Signed-off-by: Takashi Iwai <tiwai@suse.de>
/* use the non-cached pages in non-snoop mode */
if (!azx_snoop(chip))
- azx_bus(chip)->dma_type = SNDRV_DMA_TYPE_DEV_WC_SG;
+ azx_bus(chip)->dma_type = SNDRV_DMA_TYPE_DEV_WC;
if (chip->driver_type == AZX_DRIVER_NVIDIA) {
dev_dbg(chip->card->dev, "Enable delay in RIRB handling\n");