5.17-stable patches

added patches:
	parisc-mark-cr16-clock-unstable-on-all-smp-machines.patch

diff --git a/queue-5.17/parisc-mark-cr16-clock-unstable-on-all-smp-machines.patch b/queue-5.17/parisc-mark-cr16-clock-unstable-on-all-smp-machines.patch
new file mode 100644 (file)
index 0000000..1a99ecd
--- /dev/null
+++ b/queue-5.17/parisc-mark-cr16-clock-unstable-on-all-smp-machines.patch
@@ -0,0 +1,59 @@
+From 340233dcc0160aafcce46ca893d1679f16acf409 Mon Sep 17 00:00:00 2001
+From: Helge Deller <deller@gmx.de>
+Date: Sun, 8 May 2022 18:25:00 +0200
+Subject: parisc: Mark cr16 clock unstable on all SMP machines
+
+From: Helge Deller <deller@gmx.de>
+
+commit 340233dcc0160aafcce46ca893d1679f16acf409 upstream.
+
+The cr16 interval timers are not synchronized across CPUs, even with just
+one dual-core CPU. This becomes visible if the machines have a longer
+uptime.
+
+Signed-off-by: Helge Deller <deller@gmx.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/parisc/kernel/time.c |   27 ++++-----------------------
+ 1 file changed, 4 insertions(+), 23 deletions(-)
+
+--- a/arch/parisc/kernel/time.c
++++ b/arch/parisc/kernel/time.c
+@@ -249,33 +249,14 @@ void __init time_init(void)
+ static int __init init_cr16_clocksource(void)
+ {
+       /*
+-       * The cr16 interval timers are not syncronized across CPUs on
+-       * different sockets, so mark them unstable and lower rating on
+-       * multi-socket SMP systems.
++       * The cr16 interval timers are not synchronized across CPUs.
+        */
+       if (num_online_cpus() > 1 && !running_on_qemu) {
+-              int cpu;
+-              unsigned long cpu0_loc;
+-              cpu0_loc = per_cpu(cpu_data, 0).cpu_loc;
+-
+-              for_each_online_cpu(cpu) {
+-                      if (cpu == 0)
+-                              continue;
+-                      if ((cpu0_loc != 0) &&
+-                          (cpu0_loc == per_cpu(cpu_data, cpu).cpu_loc))
+-                              continue;
+-
+-                      clocksource_cr16.name = "cr16_unstable";
+-                      clocksource_cr16.flags = CLOCK_SOURCE_UNSTABLE;
+-                      clocksource_cr16.rating = 0;
+-                      break;
+-              }
++              clocksource_cr16.name = "cr16_unstable";
++              clocksource_cr16.flags = CLOCK_SOURCE_UNSTABLE;
++              clocksource_cr16.rating = 0;
+       }
+ 
+-      /* XXX: We may want to mark sched_clock stable here if cr16 clocks are
+-       *      in sync:
+-       *      (clocksource_cr16.flags == CLOCK_SOURCE_IS_CONTINUOUS) */
+-
+       /* register at clocksource framework */
+       clocksource_register_hz(&clocksource_cr16,
+               100 * PAGE0->mem_10msec);

diff --git a/queue-5.17/series b/queue-5.17/series
index 0369ce6cd501ba1c3ca66ff13d81c6426c023a19..b6c9a90a7a7420d19729dc5802ccdf4e551f79c1 100644 (file)
--- a/queue-5.17/series
+++ b/queue-5.17/series
@@ -102,3 +102,4 @@ bnxt_en-fix-unnecessary-dropping-of-rx-packets.patch
 selftests-ocelot-tc_flower_chains-specify-conform-exceed-action-for-policer.patch
 smsc911x-allow-using-irq0.patch
 btrfs-always-log-symlinks-in-full-mode.patch
+parisc-mark-cr16-clock-unstable-on-all-smp-machines.patch