arm64: dts: imx8qm-mek: add state_100mhz and state_200mhz for usdhc

default, state_100mhz and state_200mhz use the same settings. But current
driver use these to indicate if sd3.0 support.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
index 09b01e56ea004083b77769fd66112efd687a0aeb..0371de764e24c51e8e99db4526ad40a15e8e0c0e 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
@@ -811,8 +811,10 @@
 };
 
 &usdhc1 {
-       pinctrl-names = "default";
+       pinctrl-names = "default", "state_100mhz", "state_200mhz";
        pinctrl-0 = <&pinctrl_usdhc1>;
+       pinctrl-1 = <&pinctrl_usdhc1>;
+       pinctrl-2 = <&pinctrl_usdhc1>;
        bus-width = <8>;
        no-sd;
        no-sdio;
@@ -821,8 +823,10 @@
 };
 
 &usdhc2 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_usdhc2>;
+       pinctrl-names = "default", "state_100mhz", "state_200mhz";
+       pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
+       pinctrl-1 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
+       pinctrl-2 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
        bus-width = <4>;
        vmmc-supply = <&reg_usdhc2_vmmc>;
        cd-gpios = <&lsio_gpio5 22 GPIO_ACTIVE_LOW>;
@@ -1239,4 +1243,12 @@
                        IMX8QM_USDHC1_VSELECT_CONN_USDHC1_VSELECT               0x00000021
                >;
        };
+
+       pinctrl_usdhc2_gpio: usdhc2gpiogrp {
+               fsl,pins = <
+                       IMX8QM_USDHC1_DATA6_LSIO_GPIO5_IO21                     0x00000021
+                       IMX8QM_USDHC1_DATA7_LSIO_GPIO5_IO22                     0x00000021
+                       IMX8QM_USDHC1_RESET_B_LSIO_GPIO4_IO07                   0x00000021
+               >;
+       };
 };