DRM_INFO("\tuvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk);
for (i = 0; i < ps->performance_level_count; i++) {
pl = &ps->performance_levels[i];
- if (adev->asic_type >= CHIP_TAHITI)
- DRM_INFO("\t\tpower level %d sclk: %u mclk: %u vddc: %u vddci: %u pcie gen: %u\n",
- i, pl->sclk, pl->mclk, pl->vddc, pl->vddci, pl->pcie_gen + 1);
- else
- DRM_INFO("\t\tpower level %d sclk: %u mclk: %u vddc: %u vddci: %u\n",
- i, pl->sclk, pl->mclk, pl->vddc, pl->vddci);
+ DRM_INFO("\t\tpower level %d sclk: %u mclk: %u vddc: %u vddci: %u pcie gen: %u\n",
+ i, pl->sclk, pl->mclk, pl->vddc, pl->vddci, pl->pcie_gen + 1);
}
amdgpu_dpm_print_ps_status(adev, rps);
}