arm64/mm: Re-organise setting up FEAT_S1PIE registers PIRE0_EL1 and PIR_EL1

mov_q cannot really move PIE_E[0|1] macros into a general purpose register
as expected if those macro constants contain some 128 bit layout elements,
that are required for D128 page tables. The primary issue is that for D128,
PIE_E[0|1] are defined in terms of 128-bit types with shifting and masking,
which the assembler can't accommodate.

Instead pre-calculate these PIRE0_EL1/PIR_EL1 constants into asm-offsets.h
based PIE_E0_ASM/PIE_E1_ASM which can then be used in arch/arm64/mm/proc.S.

While here also drop PTE_MAYBE_NG/PTE_MAYBE_SHARED assembly overrides which
are not required any longer, as the compiler toolchains are smart enough to
compute both the PIE_[E0|E1]_ASM constants in all scenarios.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ard Biesheuvel <ardb@kernel.org>
Cc: Ryan Roberts <ryan.roberts@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: Ryan Roberts <ryan.roberts@arm.com>
Link: https://lore.kernel.org/r/20250429050511.1663235-1-anshuman.khandual@arm.com
Signed-off-by: Will Deacon <will@kernel.org>

diff --git a/arch/arm64/kernel/asm-offsets.c b/arch/arm64/kernel/asm-offsets.c
index eb1a840e4110f2e92f1e74733304db2a80e77f5d..30d4bbe68661f45f9b32b13102c91538a4e38182 100644 (file)
--- a/arch/arm64/kernel/asm-offsets.c
+++ b/arch/arm64/kernel/asm-offsets.c
@@ -182,5 +182,7 @@ int main(void)
 #ifdef CONFIG_DYNAMIC_FTRACE_WITH_DIRECT_CALLS
   DEFINE(FTRACE_OPS_DIRECT_CALL,       offsetof(struct ftrace_ops, direct_call));
 #endif
+  DEFINE(PIE_E0_ASM, PIE_E0);
+  DEFINE(PIE_E1_ASM, PIE_E1);
   return 0;
 }

diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S
index fb30c8804f87b003c8eb4c8d5f7cc9575873e051..80d470aa469d2a8919f8c0e7b7ce41131081b5b4 100644 (file)
--- a/arch/arm64/mm/proc.S
+++ b/arch/arm64/mm/proc.S
@@ -512,26 +512,11 @@ alternative_else_nop_endif
        ubfx    x1, x1, #ID_AA64MMFR3_EL1_S1PIE_SHIFT, #4
        cbz     x1, .Lskip_indirection
 
-       /*
-        * The PROT_* macros describing the various memory types may resolve to
-        * C expressions if they include the PTE_MAYBE_* macros, and so they
-        * can only be used from C code. The PIE_E* constants below are also
-        * defined in terms of those macros, but will mask out those
-        * PTE_MAYBE_* constants, whether they are set or not. So #define them
-        * as 0x0 here so we can evaluate the PIE_E* constants in asm context.
-        */
-
-#define PTE_MAYBE_NG           0
-#define PTE_MAYBE_SHARED       0
-
-       mov_q   x0, PIE_E0
+       mov_q   x0, PIE_E0_ASM
        msr     REG_PIRE0_EL1, x0
-       mov_q   x0, PIE_E1
+       mov_q   x0, PIE_E1_ASM
        msr     REG_PIR_EL1, x0
 
-#undef PTE_MAYBE_NG
-#undef PTE_MAYBE_SHARED
-
        orr     tcr2, tcr2, TCR2_EL1_PIE
        msr     REG_TCR2_EL1, x0