]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: qcom: Use correct naming for dwc3 usb nodes in dts files
authorBhupesh Sharma <bhupesh.sharma@linaro.org>
Sun, 27 Jun 2021 11:46:14 +0000 (17:16 +0530)
committerBjorn Andersson <bjorn.andersson@linaro.org>
Tue, 20 Jul 2021 13:58:12 +0000 (08:58 -0500)
The dwc3 usb nodes in several arm64 qcom dts are currently named
differently, somewhere as 'usb@<addr>' and somewhere as 'dwc3@<addr>',
leading to some confusion when one sees the entries in sysfs or
dmesg:
[    1.943482] dwc3 a600000.usb: Adding to iommu group 1
[    2.266127] dwc3 a800000.dwc3: Adding to iommu group 2

Name the usb nodes as 'usb@<addr>' for consistency, which is
the correct convention as per the 'snps,dwc3' dt-binding as
well (see [1]).

[1]. Documentation/devicetree/bindings/usb/snps,dwc3.yaml

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Link: https://lore.kernel.org/r/20210627114616.717101-2-bhupesh.sharma@linaro.org
[bjorn: Extended to also fix ipq6018]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
arch/arm64/boot/dts/qcom/ipq6018.dtsi
arch/arm64/boot/dts/qcom/msm8994.dtsi
arch/arm64/boot/dts/qcom/sm8150.dtsi
arch/arm64/boot/dts/qcom/sm8250.dtsi
arch/arm64/boot/dts/qcom/sm8350.dtsi

index b61ed01945233d2887b418bd354cf7ebf75be384..01ca4b8b9d2be45979f3e03834de09eae01741b3 100644 (file)
                        resets = <&gcc GCC_USB1_BCR>;
                        status = "disabled";
 
-                       dwc_1: dwc3@7000000 {
+                       dwc_1: usb@7000000 {
                               compatible = "snps,dwc3";
                               reg = <0x0 0x7000000 0x0 0xcd00>;
                               interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
index f9f0b5aa6a266d3694d48b82d9804c9aca0ccc52..662f2f246b9b5c369e3fc9e27c7fb8f616dd7bdd 100644 (file)
                        power-domains = <&gcc USB30_GDSC>;
                        qcom,select-utmi-as-pipe-clk;
 
-                       dwc3@f9200000 {
+                       usb@f9200000 {
                                compatible = "snps,dwc3";
                                reg = <0xf9200000 0xcc00>;
                                interrupts = <0 131 IRQ_TYPE_LEVEL_HIGH>;
index 1c84d78d0a19b0444bdb92c7224f30d3511e169a..62b88183174fb5bbab76c52a25b872f8e2680b1d 100644 (file)
 
                        resets = <&gcc GCC_USB30_SEC_BCR>;
 
-                       usb_2_dwc3: dwc3@a800000 {
+                       usb_2_dwc3: usb@a800000 {
                                compatible = "snps,dwc3";
                                reg = <0 0x0a800000 0 0xcd00>;
                                interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
index 9a6eff1813a683e84de0ee6b7b5e509771694e4d..d4432e357fcf2f342b444f3b0191eae1de409a0e 100644 (file)
 
                        resets = <&gcc GCC_USB30_PRIM_BCR>;
 
-                       usb_1_dwc3: dwc3@a600000 {
+                       usb_1_dwc3: usb@a600000 {
                                compatible = "snps,dwc3";
                                reg = <0 0x0a600000 0 0xcd00>;
                                interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
 
                        resets = <&gcc GCC_USB30_SEC_BCR>;
 
-                       usb_2_dwc3: dwc3@a800000 {
+                       usb_2_dwc3: usb@a800000 {
                                compatible = "snps,dwc3";
                                reg = <0 0x0a800000 0 0xcd00>;
                                interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
index 0d16392bb9767bf717fe6bcffc8ab261e0107b01..a631d58166b1c850339cdec9bdd134c05b11dc32 100644 (file)
 
                        resets = <&gcc GCC_USB30_PRIM_BCR>;
 
-                       usb_1_dwc3: dwc3@a600000 {
+                       usb_1_dwc3: usb@a600000 {
                                compatible = "snps,dwc3";
                                reg = <0 0x0a600000 0 0xcd00>;
                                interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
 
                        resets = <&gcc GCC_USB30_SEC_BCR>;
 
-                       usb_2_dwc3: dwc3@a800000 {
+                       usb_2_dwc3: usb@a800000 {
                                compatible = "snps,dwc3";
                                reg = <0 0x0a800000 0 0xcd00>;
                                interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;