/* Return the state of PSTATE.SM on entry to functions of type FNTYPE. */
-static aarch64_feature_flags
+static aarch64_isa_mode
aarch64_fntype_pstate_sm (const_tree fntype)
{
if (lookup_attribute ("arm", "streaming", TYPE_ATTRIBUTES (fntype)))
- return AARCH64_FL_SM_ON;
+ return AARCH64_ISA_MODE_SM_ON;
if (lookup_attribute ("arm", "streaming_compatible",
TYPE_ATTRIBUTES (fntype)))
return 0;
- return AARCH64_FL_SM_OFF;
+ return AARCH64_ISA_MODE_SM_OFF;
}
/* Return state flags that describe whether and how functions of type
/* Return the state of PSTATE.ZA on entry to functions of type FNTYPE. */
-static aarch64_feature_flags
+static aarch64_isa_mode
aarch64_fntype_pstate_za (const_tree fntype)
{
if (aarch64_fntype_shared_flags (fntype, "za")
|| aarch64_fntype_shared_flags (fntype, "zt0"))
- return AARCH64_FL_ZA_ON;
+ return AARCH64_ISA_MODE_ZA_ON;
return 0;
}
/* Return the ISA mode on entry to functions of type FNTYPE. */
-static aarch64_feature_flags
+static aarch64_isa_mode
aarch64_fntype_isa_mode (const_tree fntype)
{
return (aarch64_fntype_pstate_sm (fntype)
function FNDECL. This might be different from the state of
PSTATE.SM on entry. */
-static aarch64_feature_flags
+static aarch64_isa_mode
aarch64_fndecl_pstate_sm (const_tree fndecl)
{
if (aarch64_fndecl_is_locally_streaming (fndecl))
- return AARCH64_FL_SM_ON;
+ return AARCH64_ISA_MODE_SM_ON;
return aarch64_fntype_pstate_sm (TREE_TYPE (fndecl));
}
/* Return the state of PSTATE.ZA when compiling the body of function FNDECL.
This might be different from the state of PSTATE.ZA on entry. */
-static aarch64_feature_flags
+static aarch64_isa_mode
aarch64_fndecl_pstate_za (const_tree fndecl)
{
if (aarch64_fndecl_has_new_state (fndecl, "za")
|| aarch64_fndecl_has_new_state (fndecl, "zt0"))
- return AARCH64_FL_ZA_ON;
+ return AARCH64_ISA_MODE_ZA_ON;
return aarch64_fntype_pstate_za (TREE_TYPE (fndecl));
}
/* Return the ISA mode that should be used to compile the body of
function FNDECL. */
-static aarch64_feature_flags
+static aarch64_isa_mode
aarch64_fndecl_isa_mode (const_tree fndecl)
{
return (aarch64_fndecl_pstate_sm (fndecl)
This might be different from the state of PSTATE.SM in the function
body. */
-static aarch64_feature_flags
+static aarch64_isa_mode
aarch64_cfun_incoming_pstate_sm ()
{
return aarch64_fntype_pstate_sm (TREE_TYPE (cfun->decl));
This might be different from the state of PSTATE.ZA in the function
body. */
-static aarch64_feature_flags
+static aarch64_isa_mode
aarch64_cfun_incoming_pstate_za ()
{
return aarch64_fntype_pstate_za (TREE_TYPE (cfun->decl));
aarch64_cfun_enables_pstate_sm ()
{
return (aarch64_fndecl_is_locally_streaming (cfun->decl)
- && aarch64_cfun_incoming_pstate_sm () != AARCH64_FL_SM_ON);
+ && aarch64_cfun_incoming_pstate_sm () != AARCH64_ISA_MODE_SM_ON);
}
/* Return true if the current function has state STATE_NAME, either by
the BL instruction. */
static bool
-aarch64_call_switches_pstate_sm (aarch64_feature_flags callee_mode)
+aarch64_call_switches_pstate_sm (aarch64_isa_mode callee_mode)
{
- return (callee_mode & ~AARCH64_ISA_MODE & AARCH64_FL_SM_STATE) != 0;
+ return (bool) (callee_mode & ~AARCH64_ISA_MODE & AARCH64_ISA_MODE_SM_STATE);
}
/* Implement TARGET_COMPATIBLE_VECTOR_TYPES_P. */
return the CONST_INT that should be placed in an UNSPEC_CALLEE_ABI rtx. */
rtx
-aarch64_gen_callee_cookie (aarch64_feature_flags isa_mode, arm_pcs pcs_variant)
+aarch64_gen_callee_cookie (aarch64_isa_mode isa_mode, arm_pcs pcs_variant)
{
return gen_int_mode ((unsigned int) isa_mode
| (unsigned int) pcs_variant << AARCH64_NUM_ISA_MODES,
required ISA mode on entry to the callee, which is also the ISA
mode on return from the callee. */
-static aarch64_feature_flags
+static aarch64_isa_mode
aarch64_callee_isa_mode (rtx cookie)
{
- return UINTVAL (cookie) & AARCH64_FL_ISA_MODES;
+ return UINTVAL (cookie) & ((1 << AARCH64_NUM_ISA_MODES) - 1);
}
/* INSN is a call instruction. Return the CONST_INT stored in its
/* INSN is a call instruction. Return the required ISA mode on entry to
the callee, which is also the ISA mode on return from the callee. */
-static aarch64_feature_flags
+static aarch64_isa_mode
aarch64_insn_callee_isa_mode (const rtx_insn *insn)
{
return aarch64_callee_isa_mode (aarch64_insn_callee_cookie (insn));
rtx
aarch64_sme_vq_immediate (machine_mode mode, HOST_WIDE_INT factor,
- aarch64_feature_flags isa_mode)
+ aarch64_isa_mode isa_mode)
{
gcc_assert (aarch64_sve_rdvl_addvl_factor_p (factor));
- if (isa_mode & AARCH64_FL_SM_ON)
+ if (isa_mode & AARCH64_ISA_MODE_SM_ON)
/* We're in streaming mode, so we can use normal poly-int values. */
return gen_int_mode ({ factor, factor }, mode);
TEMP2, if nonnull, is a second temporary register that doesn't
overlap either DEST or REG.
- FORCE_ISA_MODE is AARCH64_FL_SM_ON if any variable component of OFFSET
+ FORCE_ISA_MODE is AARCH64_ISA_MODE_SM_ON if any variable component of OFFSET
is measured relative to the SME vector length instead of the current
prevailing vector length. It is 0 otherwise.
static void
aarch64_add_offset (scalar_int_mode mode, rtx dest, rtx src,
poly_int64 offset, rtx temp1, rtx temp2,
- aarch64_feature_flags force_isa_mode,
+ aarch64_isa_mode force_isa_mode,
bool frame_related_p, bool emit_move_imm = true)
{
gcc_assert (emit_move_imm || temp1 != NULL_RTX);
offset_rtx = aarch64_sme_vq_immediate (mode, offset.coeffs[0], 0);
rtx_insn *insn = emit_insn (gen_add3_insn (dest, src, offset_rtx));
RTX_FRAME_RELATED_P (insn) = frame_related_p;
- if (frame_related_p && (force_isa_mode & AARCH64_FL_SM_ON))
+ if (frame_related_p && (force_isa_mode & AARCH64_ISA_MODE_SM_ON))
add_reg_note (insn, REG_CFA_ADJUST_CFA,
gen_rtx_SET (dest, plus_constant (Pmode, src,
offset)));
{
rtx_insn *insn = emit_insn (gen_add3_insn (dest, src, offset_rtx));
RTX_FRAME_RELATED_P (insn) = true;
- if (force_isa_mode & AARCH64_FL_SM_ON)
+ if (force_isa_mode & AARCH64_ISA_MODE_SM_ON)
add_reg_note (insn, REG_CFA_ADJUST_CFA,
gen_rtx_SET (dest, plus_constant (Pmode, src,
poly_offset)));
rtx val;
if (IN_RANGE (rel_factor, -32, 31))
{
- if (force_isa_mode & AARCH64_FL_SM_ON)
+ if (force_isa_mode & AARCH64_ISA_MODE_SM_ON)
{
/* Try to use an unshifted RDSVL, otherwise fall back on
a shifted RDSVL #1. */
val = gen_int_mode (poly_int64 (low_bit, low_bit), mode);
shift = 0;
}
- else if ((force_isa_mode & AARCH64_FL_SM_ON)
+ else if ((force_isa_mode & AARCH64_ISA_MODE_SM_ON)
&& aarch64_sve_rdvl_addvl_factor_p (low_bit))
{
val = aarch64_sme_vq_immediate (mode, low_bit, 0);
static inline void
aarch64_add_sp (rtx temp1, rtx temp2, poly_int64 delta,
- aarch64_feature_flags force_isa_mode, bool emit_move_imm)
+ aarch64_isa_mode force_isa_mode, bool emit_move_imm)
{
aarch64_add_offset (Pmode, stack_pointer_rtx, stack_pointer_rtx, delta,
temp1, temp2, force_isa_mode, true, emit_move_imm);
static inline void
aarch64_sub_sp (rtx temp1, rtx temp2, poly_int64 delta,
- aarch64_feature_flags force_isa_mode,
+ aarch64_isa_mode force_isa_mode,
bool frame_related_p, bool emit_move_imm = true)
{
aarch64_add_offset (Pmode, stack_pointer_rtx, stack_pointer_rtx, -delta,
matches LOCAL_MODE. Return the label that the branch jumps to. */
static rtx_insn *
-aarch64_guard_switch_pstate_sm (rtx old_svcr, aarch64_feature_flags local_mode)
+aarch64_guard_switch_pstate_sm (rtx old_svcr, aarch64_isa_mode local_mode)
{
- local_mode &= AARCH64_FL_SM_STATE;
+ local_mode &= AARCH64_ISA_MODE_SM_STATE;
gcc_assert (local_mode != 0);
- auto already_ok_cond = (local_mode & AARCH64_FL_SM_ON ? NE : EQ);
+ auto already_ok_cond = (local_mode & AARCH64_ISA_MODE_SM_ON ? NE : EQ);
auto *label = gen_label_rtx ();
auto branch = aarch64_gen_test_and_branch (already_ok_cond, old_svcr, 0,
label);
an SMSTOP SM. */
static void
-aarch64_switch_pstate_sm (aarch64_feature_flags old_mode,
- aarch64_feature_flags new_mode)
+aarch64_switch_pstate_sm (aarch64_isa_mode old_mode, aarch64_isa_mode new_mode)
{
- old_mode &= AARCH64_FL_SM_STATE;
- new_mode &= AARCH64_FL_SM_STATE;
+ old_mode &= AARCH64_ISA_MODE_SM_STATE;
+ new_mode &= AARCH64_ISA_MODE_SM_STATE;
gcc_assert (old_mode != new_mode);
- if ((new_mode & AARCH64_FL_SM_ON)
- || (new_mode == 0 && (old_mode & AARCH64_FL_SM_OFF)))
+ if ((new_mode & AARCH64_ISA_MODE_SM_ON)
+ || (!new_mode && (old_mode & AARCH64_ISA_MODE_SM_OFF)))
emit_insn (gen_aarch64_smstart_sm ());
else
emit_insn (gen_aarch64_smstop_sm ());
else
{
pcum->pcs_variant = ARM_PCS_AAPCS64;
- pcum->isa_mode = AARCH64_FL_DEFAULT_ISA_MODE;
+ pcum->isa_mode = AARCH64_DEFAULT_ISA_MODE;
}
pcum->aapcs_reg = NULL_RTX;
pcum->aapcs_arg_processed = false;
then the signal handler doesn't know the state of the stack and can make no
assumptions about which pages have been probed.
- FORCE_ISA_MODE is AARCH64_FL_SM_ON if any variable component of POLY_SIZE
- is measured relative to the SME vector length instead of the current
- prevailing vector length. It is 0 otherwise. */
+ FORCE_ISA_MODE is AARCH64_ISA_MODE_SM_ON if any variable component of
+ POLY_SIZE is measured relative to the SME vector length instead of the
+ current prevailing vector length. It is 0 otherwise. */
static void
aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2,
poly_int64 poly_size,
- aarch64_feature_flags force_isa_mode,
+ aarch64_isa_mode force_isa_mode,
bool frame_related_p,
bool final_adjustment_p)
{
static rtx_insn *
aarch64_guard_switch_pstate_sm (unsigned int regno,
- aarch64_feature_flags local_mode)
+ aarch64_isa_mode local_mode)
{
rtx old_svcr = aarch64_read_old_svcr (regno);
return aarch64_guard_switch_pstate_sm (old_svcr, local_mode);
unsigned reg2 = frame.wb_push_candidate2;
bool emit_frame_chain = frame.emit_frame_chain;
rtx_insn *insn;
- aarch64_feature_flags force_isa_mode = 0;
+ aarch64_isa_mode force_isa_mode = 0;
if (aarch64_cfun_enables_pstate_sm ())
- force_isa_mode = AARCH64_FL_SM_ON;
+ force_isa_mode = AARCH64_ISA_MODE_SM_ON;
if (flag_stack_clash_protection
&& known_eq (callee_adjust, 0)
emit_insn (gen_aarch64_read_svcr (svcr));
emit_move_insn (aarch64_old_svcr_mem (), svcr);
guard_label = aarch64_guard_switch_pstate_sm (svcr,
- aarch64_isa_flags);
+ AARCH64_ISA_MODE);
}
aarch64_sme_mode_switch_regs args_switch;
auto &args = crtl->args.info;
HOST_WIDE_INT guard_size
= 1 << param_stack_clash_protection_guard_size;
HOST_WIDE_INT guard_used_by_caller = STACK_CLASH_CALLER_GUARD;
- aarch64_feature_flags force_isa_mode = 0;
+ aarch64_isa_mode force_isa_mode = 0;
if (aarch64_cfun_enables_pstate_sm ())
- force_isa_mode = AARCH64_FL_SM_ON;
+ force_isa_mode = AARCH64_ISA_MODE_SM_ON;
/* We can re-use the registers when:
rtx_insn *guard_label = nullptr;
if (known_ge (cfun->machine->frame.old_svcr_offset, 0))
guard_label = aarch64_guard_switch_pstate_sm (IP0_REGNUM,
- aarch64_isa_flags);
+ AARCH64_ISA_MODE);
aarch64_sme_mode_switch_regs return_switch;
if (sibcall)
return_switch.add_call_args (sibcall);
{
CUMULATIVE_ARGS *ca = get_cumulative_args (ca_v);
- if (!TARGET_SME && (ca->isa_mode & AARCH64_FL_SM_ON))
+ if (!TARGET_SME && (ca->isa_mode & AARCH64_ISA_MODE_SM_ON))
{
error ("calling a streaming function requires the ISA extension %qs",
"sme");
&& !aarch64_cfun_has_state ("zt0"))
error ("call to a function that shares %qs state from a function"
" that has no %qs state", "zt0", "zt0");
- else if (!TARGET_ZA && (ca->isa_mode & AARCH64_FL_ZA_ON))
+ else if (!TARGET_ZA && (ca->isa_mode & AARCH64_ISA_MODE_ZA_ON))
error ("call to a function that shares SME state from a function"
" that has no SME state");
/* If this is a call to a private ZA function, emit a marker to
indicate where any necessary set-up code could be inserted.
The code itself is inserted by the mode-switching pass. */
- if (TARGET_ZA && !(ca->isa_mode & AARCH64_FL_ZA_ON))
+ if (TARGET_ZA && !(ca->isa_mode & AARCH64_ISA_MODE_ZA_ON))
emit_insn (gen_aarch64_start_private_za_call ());
/* If this is a call to a shared-ZA function that doesn't share ZT0,
save and restore ZT0 around the call. */
if (aarch64_cfun_has_state ("zt0")
- && (ca->isa_mode & AARCH64_FL_ZA_ON)
+ && (ca->isa_mode & AARCH64_ISA_MODE_ZA_ON)
&& ca->shared_zt0_flags == 0)
aarch64_save_zt0 ();
}
auto callee_isa_mode = aarch64_callee_isa_mode (callee_abi);
if (aarch64_cfun_has_state ("za")
- && (callee_isa_mode & AARCH64_FL_ZA_ON)
+ && (callee_isa_mode & AARCH64_ISA_MODE_ZA_ON)
&& !shared_za_flags)
{
sorry ("call to a function that shares state other than %qs"
gen_rtx_REG (VNx16BImode, ZA_SAVED_REGNUM));
/* Keep the aarch64_start/end_private_za_call markers live. */
- if (!(callee_isa_mode & AARCH64_FL_ZA_ON))
+ if (!(callee_isa_mode & AARCH64_ISA_MODE_ZA_ON))
use_reg (&CALL_INSN_FUNCTION_USAGE (call_insn),
gen_rtx_REG (VNx16BImode, LOWERING_REGNUM));
/* If this is a call to a private ZA function, emit a marker to
indicate where any necessary restoration code could be inserted.
The code itself is inserted by the mode-switching pass. */
- if (TARGET_ZA && !(ca->isa_mode & AARCH64_FL_ZA_ON))
+ if (TARGET_ZA && !(ca->isa_mode & AARCH64_ISA_MODE_ZA_ON))
emit_insn (gen_aarch64_end_private_za_call ());
/* If this is a call to a shared-ZA function that doesn't share ZT0,
save and restore ZT0 around the call. */
if (aarch64_cfun_has_state ("zt0")
- && (ca->isa_mode & AARCH64_FL_ZA_ON)
+ && (ca->isa_mode & AARCH64_ISA_MODE_ZA_ON)
&& ca->shared_zt0_flags == 0)
aarch64_restore_zt0 (false);
}
auto new_isa_mode = (fndecl
? aarch64_fndecl_isa_mode (fndecl)
- : AARCH64_FL_DEFAULT_ISA_MODE);
+ : AARCH64_DEFAULT_ISA_MODE);
auto isa_flags = TREE_TARGET_OPTION (new_tree)->x_aarch64_isa_flags;
static bool reported_zt0_p;
aarch64_pragma_target_parse. */
if (old_tree == new_tree
&& (!fndecl || aarch64_previous_fndecl)
- && (isa_flags & AARCH64_FL_ISA_MODES) == new_isa_mode)
+ && (aarch64_isa_mode) (isa_flags & AARCH64_FL_ISA_MODES) == new_isa_mode)
{
gcc_assert (AARCH64_ISA_MODE == new_isa_mode);
return;
/* The ISA mode can vary based on function type attributes and
function declaration attributes. Make sure that the target
options correctly reflect these attributes. */
- if ((isa_flags & AARCH64_FL_ISA_MODES) != new_isa_mode)
+ if ((aarch64_isa_mode) (isa_flags & AARCH64_FL_ISA_MODES) != new_isa_mode)
{
auto base_flags = (aarch64_asm_isa_flags & ~AARCH64_FL_ISA_MODES);
- aarch64_set_asm_isa_flags (base_flags | new_isa_mode);
+ aarch64_set_asm_isa_flags (base_flags
+ | (aarch64_feature_flags) new_isa_mode);
aarch64_override_options_internal (&global_options);
new_tree = build_target_option_node (&global_options,
{
gcc_assert (tmp_arch);
selected_arch = tmp_arch->arch;
- aarch64_set_asm_isa_flags (tmp_flags | AARCH64_ISA_MODE);
+ aarch64_set_asm_isa_flags (tmp_flags | (aarch64_asm_isa_flags
+ & AARCH64_FL_ISA_MODES));
return true;
}
gcc_assert (tmp_cpu);
selected_tune = tmp_cpu->ident;
selected_arch = tmp_cpu->arch;
- aarch64_set_asm_isa_flags (tmp_flags | AARCH64_ISA_MODE);
+ aarch64_set_asm_isa_flags (tmp_flags | (aarch64_asm_isa_flags
+ & AARCH64_FL_ISA_MODES));
return true;
}
features if the user wants to handpick specific features. */
if (strncmp ("+nothing", str, 8) == 0)
{
- isa_flags = AARCH64_ISA_MODE;
+ isa_flags &= AARCH64_FL_ISA_MODES;
str += 8;
}
rtx_insn *guard_label = nullptr;
if (TARGET_STREAMING_COMPATIBLE)
guard_label = aarch64_guard_switch_pstate_sm (IP0_REGNUM,
- AARCH64_FL_SM_OFF);
+ AARCH64_ISA_MODE_SM_OFF);
aarch64_sme_mode_switch_regs args_switch;
args_switch.add_call_preserved_regs (df_get_live_in (bb));
args_switch.emit_prologue ();
- aarch64_switch_pstate_sm (AARCH64_FL_SM_OFF, AARCH64_FL_SM_ON);
+ aarch64_switch_pstate_sm (AARCH64_ISA_MODE_SM_OFF, AARCH64_ISA_MODE_SM_ON);
args_switch.emit_epilogue ();
if (guard_label)
emit_label (guard_label);
rtx_insn *guard_label = nullptr;
if (TARGET_STREAMING_COMPATIBLE)
guard_label = aarch64_guard_switch_pstate_sm (IP0_REGNUM,
- AARCH64_FL_SM_OFF);
- aarch64_switch_pstate_sm (AARCH64_FL_SM_ON, AARCH64_FL_SM_OFF);
+ AARCH64_ISA_MODE_SM_OFF);
+ aarch64_switch_pstate_sm (AARCH64_ISA_MODE_SM_ON, AARCH64_ISA_MODE_SM_OFF);
if (guard_label)
emit_label (guard_label);
auto seq = get_insns ();
bool
pass_switch_pstate_sm::gate (function *fn)
{
- return (aarch64_fndecl_pstate_sm (fn->decl) != AARCH64_FL_SM_OFF
+ return (aarch64_fndecl_pstate_sm (fn->decl) != AARCH64_ISA_MODE_SM_OFF
|| cfun->machine->call_switches_pstate_sm);
}
projects / thirdparty / gcc.git / commitdiff
