+++ /dev/null
-From foo@baz Sun Mar 18 16:55:33 CET 2018
-From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
-Date: Tue, 7 Mar 2017 16:53:19 +0100
-Subject: net: mvpp2: set dma mask and coherent dma mask on PPv2.2
-
-From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
-
-
-[ Upstream commit 2067e0a13cfe0b1bdca7b91bc5e4f2740b07d478 ]
-
-On PPv2.2, the streaming mappings can be anywhere in the first 40 bits
-of the physical address space. However, for the coherent mappings, we
-still need them to be in the first 32 bits of the address space,
-because all BM pools share a single register to store the high 32 bits
-of the BM pool address, which means all BM pools must be allocated in
-the same 4GB memory area.
-
-Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- drivers/net/ethernet/marvell/mvpp2.c | 14 ++++++++++++++
- 1 file changed, 14 insertions(+)
-
---- a/drivers/net/ethernet/marvell/mvpp2.c
-+++ b/drivers/net/ethernet/marvell/mvpp2.c
-@@ -6420,6 +6420,20 @@ static int mvpp2_probe(struct platform_d
- /* Get system's tclk rate */
- priv->tclk = clk_get_rate(priv->pp_clk);
-
-+ if (priv->hw_version == MVPP22) {
-+ err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(40));
-+ if (err)
-+ goto err_mg_clk;
-+ /* Sadly, the BM pools all share the same register to
-+ * store the high 32 bits of their address. So they
-+ * must all have the same high 32 bits, which forces
-+ * us to restrict coherent memory to DMA_BIT_MASK(32).
-+ */
-+ err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
-+ if (err)
-+ goto err_mg_clk;
-+ }
-+
- /* Initialize network controller */
- err = mvpp2_init(pdev, priv);
- if (err < 0) {
drm-sun4i-set-drm_crtc.port-to-the-underlying-tcon-s-output-port-node.patch
ath10k-fix-a-warning-during-channel-switch-with-multiple-vaps.patch
drm-sun4i-fix-tcon-clock-and-regmap-initialization-sequence.patch
-net-mvpp2-set-dma-mask-and-coherent-dma-mask-on-ppv2.2.patch
pci-msi-stop-disabling-msi-msi-x-in-pci_device_shutdown.patch
selinux-check-for-address-length-in-selinux_socket_bind.patch
x86-mm-make-mmap-map_32bit-work-correctly.patch
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
- arch/x86/kernel/sys_x86_64.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
+ arch/x86/kernel/sys_x86_64.c | 5 +++--
+ 1 file changed, 3 insertions(+), 2 deletions(-)
--- a/arch/x86/kernel/sys_x86_64.c
+++ b/arch/x86/kernel/sys_x86_64.c
-@@ -100,7 +100,7 @@ out:
+@@ -16,6 +16,7 @@
+ #include <linux/uaccess.h>
+ #include <linux/elf.h>
+
++#include <asm/compat.h>
+ #include <asm/ia32.h>
+ #include <asm/syscalls.h>
+
+@@ -100,7 +101,7 @@ out:
static void find_start_end(unsigned long flags, unsigned long *begin,
unsigned long *end)
{
/* This is usually used needed to map code in small
model, so it needs to be in the first 31bit. Limit
it to that. This means we need to move the
-@@ -175,7 +175,7 @@ arch_get_unmapped_area_topdown(struct fi
+@@ -175,7 +176,7 @@ arch_get_unmapped_area_topdown(struct fi
return addr;
/* for MAP_32BIT mappings we force the legacy mmap base */