AArch64, Arm and TIC6x tests: fix typo in linker scripts

The linker scripts for AArch64 and TIC6x were probably originally copied from
Arm testsuite, and contain the same typo in the name of the attributes section.

This patch fixes the typo across all the testsuites.

diff --git a/ld/testsuite/ld-aarch64/aarch64.ld b/ld/testsuite/ld-aarch64/aarch64.ld
index 75ee3b589346539bd5680398af3245b33ca8b13e..4676cd41f1cbabb4f8e32d76ccf74fb11db102eb 100644 (file)
--- a/ld/testsuite/ld-aarch64/aarch64.ld
+++ b/ld/testsuite/ld-aarch64/aarch64.ld
@@ -15,5 +15,5 @@ SECTIONS
   .got            : { *(.got) *(.got.plt)}
   . = 0x12340000;
   .far : { *(.far) }
-  .ARM.attributes 0 : { *(.ARM.atttributes) }
+  .ARM.attributes 0 : { *(.ARM.attributes) }
 }

diff --git a/ld/testsuite/ld-aarch64/protections/bti-plt.ld b/ld/testsuite/ld-aarch64/protections/bti-plt.ld
index 8682623d69b97cd735a7459838c0ce547723c337..cab4209186965c0629ebc50c0ab1d814b0ad9f82 100644 (file)
--- a/ld/testsuite/ld-aarch64/protections/bti-plt.ld
+++ b/ld/testsuite/ld-aarch64/protections/bti-plt.ld
@@ -10,5 +10,5 @@ SECTIONS
   .text           : { *(.text) }
   . = 0x28000;
   .got            : { *(.got) *(.got.plt) }
-  .ARM.attributes 0 : { *(.ARM.atttributes) }
+  .ARM.attributes 0 : { *(.ARM.attributes) }
 }

diff --git a/ld/testsuite/ld-aarch64/relocs-ilp32.ld b/ld/testsuite/ld-aarch64/relocs-ilp32.ld
index 4ddba9141209a48c1342c4ffaf65b327d91873a8..3958ad8b533c8cc9bcbce056584ea330a636f203 100644 (file)
--- a/ld/testsuite/ld-aarch64/relocs-ilp32.ld
+++ b/ld/testsuite/ld-aarch64/relocs-ilp32.ld
@@ -15,7 +15,7 @@ SECTIONS
   .got            : { *(.got) *(.got.plt)}
   . = 0x12340000;
   .far : { *(.far) }
-  .ARM.attributes 0 : { *(.ARM.atttributes) }
+  .ARM.attributes 0 : { *(.ARM.attributes) }
   /* Providing a .data section triggers a non-executable segment to be
      generated, which gives somewhere else for the linker to put the TLS
      segment without creating a RWX permissioned one. */

diff --git a/ld/testsuite/ld-aarch64/relocs.ld b/ld/testsuite/ld-aarch64/relocs.ld
index 77adac8b46e01b488e68405b1291335a2dfa29fc..b0e75e0e29a04c94ea0a3bf429a73fc92e864f45 100644 (file)
--- a/ld/testsuite/ld-aarch64/relocs.ld
+++ b/ld/testsuite/ld-aarch64/relocs.ld
@@ -15,7 +15,7 @@ SECTIONS
   .got            : { *(.got) *(.got.plt)}
   . = 0x12340000;
   .far : { *(.far) }
-  .ARM.attributes 0 : { *(.ARM.atttributes) }
+  .ARM.attributes 0 : { *(.ARM.attributes) }
   /* Providing a .data section triggers a non-executable segment to be
      generated, which gives somewhere else for the linker to put the TLS
      segment without creating a RWX permissioned one. */

diff --git a/ld/testsuite/ld-aarch64/variant_pcs.ld b/ld/testsuite/ld-aarch64/variant_pcs.ld
index a66a9343a77bd2ed42addf35f828f85b8492b039..0f515324814a6ffd2bbf47814702ced564a7c712 100644 (file)
--- a/ld/testsuite/ld-aarch64/variant_pcs.ld
+++ b/ld/testsuite/ld-aarch64/variant_pcs.ld
@@ -19,5 +19,5 @@ SECTIONS
   .rela.plt       : { *(.rela.plt) *(.rela.iplt) }
   . = 0x12340000;
   .far : { *(.far) }
-  .ARM.attributes 0 : { *(.ARM.atttributes) }
+  .ARM.attributes 0 : { *(.ARM.attributes) }
 }

diff --git a/ld/testsuite/ld-arm/arm.ld b/ld/testsuite/ld-arm/arm.ld
index 8e3fac2846396e185c3eb29fa3cc9a4acf8cefee..4b596ce9ce9b0ddef144b393f038cd06df4c771d 100644 (file)
--- a/ld/testsuite/ld-arm/arm.ld
+++ b/ld/testsuite/ld-arm/arm.ld
@@ -19,5 +19,5 @@ SECTIONS
   .got            : { *(.got) *(.got.plt)}
   . = 0x12340000;
   .far : { *(.far) }
-  .ARM.attribues 0 : { *(.ARM.atttributes) }
+  .ARM.attributes 0 : { *(.ARM.attributes) }
 }

diff --git a/ld/testsuite/ld-arm/arm_purecode.ld b/ld/testsuite/ld-arm/arm_purecode.ld
index 195aca1be93374774c4b5d406e28865c35735a7c..488e3dda2d7613e7500c57a4a66e19da4dc7449b 100644 (file)
--- a/ld/testsuite/ld-arm/arm_purecode.ld
+++ b/ld/testsuite/ld-arm/arm_purecode.ld
@@ -28,5 +28,5 @@ SECTIONS
   .got            : { *(.got) *(.got.plt)}
   . = 0x12340000;
   .far : { *(.far) }
-  .ARM.attribues 0 : { *(.ARM.atttributes) }
+  .ARM.attributes 0 : { *(.ARM.attributes) }
 }

diff --git a/ld/testsuite/ld-arm/discard-unwind.ld b/ld/testsuite/ld-arm/discard-unwind.ld
index d8f6524aa9f8ce86dca9b5a8a4e0d6d2244d2b10..54418f71870988df73c550d573519fe25aeace62 100644 (file)
--- a/ld/testsuite/ld-arm/discard-unwind.ld
+++ b/ld/testsuite/ld-arm/discard-unwind.ld
@@ -15,5 +15,5 @@ SECTIONS
     *(.v4_bx)
   } =0
   /DISCARD/ : { *(.ARM.exidx*) }
-  .ARM.attribues 0 : { *(.ARM.atttributes) }
+  .ARM.attributes 0 : { *(.ARM.attributes) }
 }

diff --git a/ld/testsuite/ld-arm/script-type.ld b/ld/testsuite/ld-arm/script-type.ld
index 01995eb07ebef2515a30376bded2f662990ecbca..af346976cd19ff036a34fdd6b14b7c93456fa70d 100644 (file)
--- a/ld/testsuite/ld-arm/script-type.ld
+++ b/ld/testsuite/ld-arm/script-type.ld
@@ -3,7 +3,7 @@ SECTIONS {
        foo_a = bar_a;
        foo_t = bar_t;
        foo_o = bar_o;
-       *(.text) 
+       *(.text)
     }
-    .ARM.attribues 0 : { *(.ARM.attributes) }
+    .ARM.attributes 0 : { *(.ARM.attributes) }
 }

diff --git a/ld/testsuite/ld-tic6x/discard-unwind.ld b/ld/testsuite/ld-tic6x/discard-unwind.ld
index 00582c1e7b70e3258d2f340663b8f877a2444d29..172e2a8bc05c2b84d861a276dcc18658759d021d 100644 (file)
--- a/ld/testsuite/ld-tic6x/discard-unwind.ld
+++ b/ld/testsuite/ld-tic6x/discard-unwind.ld
@@ -11,5 +11,5 @@ SECTIONS
     *(.c6xabi.extab*)
   } =0
   /DISCARD/ : { *(.c6xabi.exidx*) }
-  .c6xabi.attribues 0 : { *(.c6xabi.atttributes) }
+  .c6xabi.attributes 0 : { *(.c6xabi.attributes) }
 }

diff --git a/ld/testsuite/ld-tic6x/unwind.ld b/ld/testsuite/ld-tic6x/unwind.ld
index a4f87229f49c0e610a171504bb15b74f71c68e31..01ba9b6f72d000bb5a44b39eb5a8ee68e8dd9d94 100644 (file)
--- a/ld/testsuite/ld-tic6x/unwind.ld
+++ b/ld/testsuite/ld-tic6x/unwind.ld
@@ -16,5 +16,5 @@ SECTIONS
   .got            : { *(.got) *(.got.plt)}
   . = 0x12340000;
   .far : { *(.far) }
-  .c6xabi.attribues 0 : { *(.c6xabi.atttributes) }
+  .c6xabi.attributes 0 : { *(.c6xabi.attributes) }
 }