--- /dev/null
+From 5ffa8518851f1401817c15d2a7eecc0373c26ff9 Mon Sep 17 00:00:00 2001
+From: Helge Deller <deller@gmx.de>
+Date: Fri, 12 Jan 2018 22:44:00 +0100
+Subject: parisc: Use cr16 interval timers unconditionally on qemu
+
+From: Helge Deller <deller@gmx.de>
+
+commit 5ffa8518851f1401817c15d2a7eecc0373c26ff9 upstream.
+
+When running on qemu we know that the (emulated) cr16 cpu-internal
+clocks are syncronized. So let's use them unconditionally on qemu.
+
+Signed-off-by: Helge Deller <deller@gmx.de>
+Cc: stable@vger.kernel.org # 4.14+
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/parisc/include/asm/processor.h | 2 ++
+ arch/parisc/kernel/time.c | 2 +-
+ 2 files changed, 3 insertions(+), 1 deletion(-)
+
+--- a/arch/parisc/include/asm/processor.h
++++ b/arch/parisc/include/asm/processor.h
+@@ -323,6 +323,8 @@ extern int _parisc_requires_coherency;
+ #define parisc_requires_coherency() (0)
+ #endif
+
++extern int running_on_qemu;
++
+ #endif /* __ASSEMBLY__ */
+
+ #endif /* __ASM_PARISC_PROCESSOR_H */
+--- a/arch/parisc/kernel/time.c
++++ b/arch/parisc/kernel/time.c
+@@ -299,7 +299,7 @@ static int __init init_cr16_clocksource(
+ * The cr16 interval timers are not syncronized across CPUs, so mark
+ * them unstable and lower rating on SMP systems.
+ */
+- if (num_online_cpus() > 1) {
++ if (num_online_cpus() > 1 && !running_on_qemu) {
+ clocksource_cr16.flags = CLOCK_SOURCE_UNSTABLE;
+ clocksource_cr16.rating = 0;
+ }
virtio-honour-may_reduce_num-in-vring_create_virtqueue.patch
arm-dts-at91-fix-typo-in-isc_d0-on-pc9.patch
arm64-futex-fix-futex_wake_op-atomic-ops-with-non-zero-result-value.patch
+parisc-use-cr16-interval-timers-unconditionally-on-qemu.patch
xen-prevent-buffer-overflow-in-privcmd-ioctl.patch
sched-fair-do-not-re-read-h_load_next-during-hierarchical-load-calculation.patch
xtensa-fix-return_address.patch