soc: rockchip: power-domain: Replace dsb() with smb()

It's unclear if these are really needed at all, but seemingly their
purpose is only as a write barrier. Use the general macro instead of the
ARM-specific one.

This driver is partially marked for COMPILE_TEST'ing, but it doesn't
build under non-ARM architectures. Fix this up before *really* enabling
it for COMPILE_TEST.

Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20220426014545.628100-2-briannorris@chromium.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/drivers/soc/rockchip/pm_domains.c b/drivers/soc/rockchip/pm_domains.c
index 1b029e494274d6f8584aa82ffe1c1477d7eb8b25..cf16ff9b73b330136162c0d67dad8de104eb2c04 100644 (file)
--- a/drivers/soc/rockchip/pm_domains.c
+++ b/drivers/soc/rockchip/pm_domains.c
@@ -178,7 +178,7 @@ static int rockchip_pmu_set_idle_request(struct rockchip_pm_domain *pd,
                regmap_update_bits(pmu->regmap, pmu->info->req_offset,
                                   pd_info->req_mask, idle ? -1U : 0);
 
-       dsb(sy);
+       wmb();
 
        /* Wait util idle_ack = 1 */
        target_ack = idle ? pd_info->ack_mask : 0;
@@ -285,7 +285,7 @@ static void rockchip_do_pmu_set_power_domain(struct rockchip_pm_domain *pd,
                regmap_update_bits(pmu->regmap, pmu->info->pwr_offset,
                                   pd->info->pwr_mask, on ? 0 : -1U);
 
-       dsb(sy);
+       wmb();
 
        if (readx_poll_timeout_atomic(rockchip_pmu_domain_is_on, pd, is_on,
                                      is_on == on, 0, 10000)) {