SPARC: fix nearbyint on sNaN input

nearbyint and nearbyintf should not trigger inexact exceptions, but
should still trigger an invalid exception for a sNaN input.

The SPARC specific implementations of these functions save the FSR at
the beginning of the function and restore it at the end to not trigger
an inexact exception. This however doesn't work for an sNaN input which
need to trigger an invalid exception. Fix that by adding a fcmp
instruction using the input value before saving FSR, so that an invalid
exception is triggered for a sNaN input.

This fixes the math/test-nearbyint-except test on SPARC.

Changelog:
	* sparc/sparc32/sparcv9/fpu/s_nearbyint.S (__nearbyint): Trigger an
	invalid exception for a sNaN input.
	* sparc/sparc32/sparcv9/fpu/s_nearbyintf.S (__nearbyintf): Likewise.
	* sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-vis3.S
	(__nearbyint_vis3): Likewise
	* sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-vis3.S
	(__nearbyintf_vis3): Likewise
	* sparc/sparc64/fpu/s_nearbyint.S (__nearbyint): Likewise.
	* sparc/sparc64/fpu/s_nearbyintf.S (__nearbyintf): Likewise.
	* sparc/sparc64/fpu/multiarch/s_nearbyint-vis3.S (__nearbyint_vis3):
	Likewise.
	* sparc/sparc64/fpu/multiarch/s_nearbyintf-vis3.S (__nearbyintf_vis3):
	Likewise.

diff --git a/ChangeLog b/ChangeLog
index 5844894b26365fd5232046c05a2a4e8f38bae72a..a7ca1ff16e9c9a79f7fac2cf67cb6de17ac3d276 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,19 @@
+2016-07-01  Aurelien Jarno  <aurelien@aurel32.net>
+
+       * sparc/sparc32/sparcv9/fpu/s_nearbyint.S (__nearbyint): Trigger an
+       invalid exception for a sNaN input.
+       * sparc/sparc32/sparcv9/fpu/s_nearbyintf.S (__nearbyintf): Likewise.
+       * sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-vis3.S
+       (__nearbyint_vis3): Likewise
+       * sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-vis3.S
+       (__nearbyintf_vis3): Likewise
+       * sparc/sparc64/fpu/s_nearbyint.S (__nearbyint): Likewise.
+       * sparc/sparc64/fpu/s_nearbyintf.S (__nearbyintf): Likewise.
+       * sparc/sparc64/fpu/multiarch/s_nearbyint-vis3.S (__nearbyint_vis3):
+       Likewise.
+       * sparc/sparc64/fpu/multiarch/s_nearbyintf-vis3.S (__nearbyintf_vis3):
+       Likewise.
+
 2016-07-01  H.J. Lu  <hongjiu.lu@intel.com>
 
        [BZ #20139]

diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-vis3.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-vis3.S
index 4475e8c315c463aa15816d2622fc29e9314c8a17..d9ff0cc2884d13dcb86f003d0af636df3d6917d3 100644 (file)
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-vis3.S
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-vis3.S
@@ -36,6 +36,7 @@
 #define SIGN_BIT       %f12                    /* -0.0 */
 
 ENTRY (__nearbyint_vis3)
+       fcmpd   %fcc3, %f0, %f0                 /* Check for sNaN */
        st      %fsr, [%sp + 88]
        sethi   %hi(TWO_FIFTYTWO), %o2
        sethi   %hi(0xf8003e0), %o5

diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-vis3.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-vis3.S
index e39134b686630c06c0a6ad9bd560cde046f5cba8..5cd1eb02db5ab95db9a82f362fb625dcdc66c737 100644 (file)
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-vis3.S
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-vis3.S
@@ -35,6 +35,7 @@
 #define SIGN_BIT       %f12                    /* -0.0 */
 
 ENTRY (__nearbyintf_vis3)
+       fcmps   %fcc3, %f1, %f1                 /* Check for sNaN */
        st      %fsr, [%sp + 88]
        movwtos %o0, %f1
        sethi   %hi(TWO_TWENTYTHREE), %o2

diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyint.S b/sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyint.S
index 29b56b471c0103959ed6c4d94772754432be4962..84a10971a4eb1a849b17d30e9a1038e8748142f4 100644 (file)
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyint.S
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyint.S
@@ -36,6 +36,7 @@
 #define SIGN_BIT       %f12                    /* -0.0 */
 
 ENTRY (__nearbyint)
+       fcmpd   %fcc3, %f0, %f0                 /* Check for sNaN */
        st      %fsr, [%sp + 88]
        sethi   %hi(TWO_FIFTYTWO), %o2
        sethi   %hi(0xf8003e0), %o5

diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyintf.S b/sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyintf.S
index e2188b20a4c721341539681eb60fd70a12b54bfc..d5cf5ce815afadbd86b26a5497514279d25d44ce 100644 (file)
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyintf.S
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyintf.S
@@ -35,6 +35,7 @@
 #define SIGN_BIT       %f12                    /* -0.0 */
 
 ENTRY (__nearbyintf)
+       fcmps   %fcc3, %f1, %f1                 /* Check for sNaN */
        st      %fsr, [%sp + 88]
        st      %o0, [%sp + 68]
        sethi   %hi(TWO_TWENTYTHREE), %o2

diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint-vis3.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint-vis3.S
index fff277ae4906d210e961b0453222aedace0e1197..3180554f11a7ee1402ee88467a39f69e46cbfcd4 100644 (file)
--- a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint-vis3.S
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint-vis3.S
@@ -35,6 +35,7 @@
 #define SIGN_BIT       %f12                    /* -0.0 */
 
 ENTRY (__nearbyint_vis3)
+       fcmpd   %fcc3, %f0, %f0                 /* Check for sNaN */
        stx     %fsr, [%sp + STACK_BIAS + 144]
        sethi   %hi(TWO_FIFTYTWO), %o2
        sllx    %o2, 32, %o2

diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf-vis3.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf-vis3.S
index c6e94ba73b948398ea214d3d1ddfd085446b5b62..7bf7eedb9a21351f75e00380e8992c106696ddcf 100644 (file)
--- a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf-vis3.S
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf-vis3.S
@@ -35,6 +35,7 @@
 #define SIGN_BIT       %f12                    /* -0.0 */
 
 ENTRY (__nearbyintf_vis3)
+       fcmps   %fcc3, %f1, %f1                 /* Check for sNaN */
        stx     %fsr, [%sp + STACK_BIAS + 144]
        sethi   %hi(0xf8003e0), %o5
        sethi   %hi(TWO_TWENTYTHREE), %o2

diff --git a/sysdeps/sparc/sparc64/fpu/s_nearbyint.S b/sysdeps/sparc/sparc64/fpu/s_nearbyint.S
index caf4d729e0582326057dc1889825b07707d799e6..456c31565f29522b871090002772dabf7cd6347c 100644 (file)
--- a/sysdeps/sparc/sparc64/fpu/s_nearbyint.S
+++ b/sysdeps/sparc/sparc64/fpu/s_nearbyint.S
@@ -35,6 +35,7 @@
 #define SIGN_BIT       %f12                    /* -0.0 */
 
 ENTRY (__nearbyint)
+       fcmpd   %fcc3, %f0, %f0                 /* Check for sNaN */
        stx     %fsr, [%sp + STACK_BIAS + 144]
        sethi   %hi(TWO_FIFTYTWO), %o2
        sllx    %o2, 32, %o2

diff --git a/sysdeps/sparc/sparc64/fpu/s_nearbyintf.S b/sysdeps/sparc/sparc64/fpu/s_nearbyintf.S
index 4232eca9ade9a9375742417de061129c0b07ab55..d0d9bed3dd87b58ad7eb64120ac9f35cabd56fe2 100644 (file)
--- a/sysdeps/sparc/sparc64/fpu/s_nearbyintf.S
+++ b/sysdeps/sparc/sparc64/fpu/s_nearbyintf.S
@@ -35,6 +35,7 @@
 #define SIGN_BIT       %f12                    /* -0.0 */
 
 ENTRY (__nearbyintf)
+       fcmps   %fcc3, %f1, %f1                 /* Check for sNaN */
        stx     %fsr, [%sp + STACK_BIAS + 144]
        sethi   %hi(0xf8003e0), %o5
        sethi   %hi(TWO_TWENTYTHREE), %o2