IBM zSystems: Use NAND instruction to implement bit not

gcc/ChangeLog:

	* config/s390/s390.md (*not<mode>): New pattern.

gcc/testsuite/ChangeLog:

	* gcc.target/s390/not.c: New test.

diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md
index 0e56fbad44d22b94e58f3044e8503a2fadeef7e7..4828aa08be6f70ad15aa413c332746f227ca0068 100644 (file)
--- a/gcc/config/s390/s390.md
+++ b/gcc/config/s390/s390.md
@@ -8302,6 +8302,14 @@
   "n<ANDOR:inv_no><GPR:g>rk\t%0,%1,%2"
   [(set_attr "op_type" "RRF")])
 
+; Use NAND for bit inversion
+(define_insn "*not<mode>"
+  [(set (match_operand:GPR          0 "register_operand" "=d")
+       (not:GPR (match_operand:GPR 1 "register_operand"  "d")))
+   (clobber (reg:CC CC_REGNUM))]
+  "TARGET_Z15"
+  "nn<GPR:g>rk\t%0,%1,%1"
+  [(set_attr "op_type" "RRF")])
 
 ;
 ; Block inclusive or (OC) patterns.

diff --git a/gcc/testsuite/gcc.target/s390/not.c b/gcc/testsuite/gcc.target/s390/not.c
new file mode 100644 (file)
index 0000000..dae95f7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/not.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -march=z15 -mzarch" } */
+
+unsigned long
+foo (unsigned long a)
+{
+  return ~a;
+}
+
+/* { dg-final { scan-assembler-times "\tnngrk\t" 1 { target { lp64 } } } } */
+/* { dg-final { scan-assembler-times "\tnnrk\t" 1 { target { ! lp64 } } } } */