dt-bindings: clock: samsung: remove define with number of clocks for FSD

Number of clocks supported by Linux drivers might vary - sometimes we
add new clocks, not exposed previously.  Therefore these numbers of
clocks should not be in the bindings, as that prevents changing them.
Remove it entirely from the bindings, once Linux drivers stopped using
them.

Signed-off-by: Inbaraj E <inbaraj.e@samsung.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20240917094355.37887-3-inbaraj.e@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

diff --git a/include/dt-bindings/clock/fsd-clk.h b/include/dt-bindings/clock/fsd-clk.h
index c8a2af1dd1ad6d8f3bdf3d2e32a9b8227885f262..3f7b64d935580acb544e4844e61de33dbac89491 100644 (file)
--- a/include/dt-bindings/clock/fsd-clk.h
+++ b/include/dt-bindings/clock/fsd-clk.h
@@ -28,7 +28,6 @@
 #define DOUT_CMU_IMEM_ACLK                     13
 #define DOUT_CMU_IMEM_DMACLK                   14
 #define GAT_CMU_FSYS0_SHARED0DIV4              15
-#define CMU_NR_CLK                             16
 
 /* PERIC */
 #define PERIC_SCLK_UART0                       1
@@ -76,7 +75,6 @@
 #define PERIC_EQOS_PHYRXCLK_MUX                        43
 #define PERIC_EQOS_PHYRXCLK                    44
 #define PERIC_DOUT_RGMII_CLK                   45
-#define PERIC_NR_CLK                           46
 
 /* FSYS0 */
 #define UFS0_MPHY_REFCLK_IXTAL24               1
@@ -101,7 +99,6 @@
 #define FSYS0_EQOS_TOP0_IPCLKPORT_RGMII_CLK_I  20
 #define FSYS0_EQOS_TOP0_IPCLKPORT_CLK_RX_I     21
 #define FSYS0_DOUT_FSYS0_PERIBUS_GRP           22
-#define FSYS0_NR_CLK                           23
 
 /* FSYS1 */
 #define PCIE_LINK0_IPCLKPORT_DBI_ACLK          1
@@ -112,7 +109,6 @@
 #define PCIE_LINK1_IPCLKPORT_AUX_ACLK          6
 #define PCIE_LINK1_IPCLKPORT_MSTR_ACLK         7
 #define PCIE_LINK1_IPCLKPORT_SLV_ACLK          8
-#define FSYS1_NR_CLK                           9
 
 /* IMEM */
 #define IMEM_DMA0_IPCLKPORT_ACLK               1
@@ -126,11 +122,9 @@
 #define IMEM_TMU_TOP_IPCLKPORT_I_CLK_TS                9
 #define IMEM_TMU_GPU_IPCLKPORT_I_CLK_TS                10
 #define IMEM_TMU_GT_IPCLKPORT_I_CLK_TS         11
-#define IMEM_NR_CLK                            12
 
 /* MFC */
 #define MFC_MFC_IPCLKPORT_ACLK                 1
-#define MFC_NR_CLK                             2
 
 /* CAM_CSI */
 #define CAM_CSI0_0_IPCLKPORT_I_ACLK            1
@@ -145,6 +139,5 @@
 #define CAM_CSI2_1_IPCLKPORT_I_ACLK            10
 #define CAM_CSI2_2_IPCLKPORT_I_ACLK            11
 #define CAM_CSI2_3_IPCLKPORT_I_ACLK            12
-#define CAM_CSI_NR_CLK                         13
 
 #endif /*_DT_BINDINGS_CLOCK_FSD_H */