drm/msm/dsi: Add phy configuration for MSM8937

Add phy configuration for 28nm dsi phy found on MSM8937 SoC. Only
difference from existing msm8916 configuration is number of phy
and io_start addresses.

Signed-off-by: Daniil Titov <daniilt971@gmail.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Barnabás Czémán <trabarni@gmail.com>
Patchwork: https://patchwork.freedesktop.org/patch/600518/
Link: https://lore.kernel.org/r/20240623-dsi-v2-4-a0ca70fb4846@gmail.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
index 24a347fe29984b5a05e252cb357cf3cb8e83f9b8..dd58bc0a49eb5ca96370f7832d9251609ac0c552 100644 (file)
--- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
+++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
@@ -545,6 +545,8 @@ static const struct of_device_id dsi_phy_dt_match[] = {
          .data = &dsi_phy_28nm_lp_cfgs },
        { .compatible = "qcom,dsi-phy-28nm-8226",
          .data = &dsi_phy_28nm_8226_cfgs },
+       { .compatible = "qcom,dsi-phy-28nm-8937",
+         .data = &dsi_phy_28nm_8937_cfgs },
 #endif
 #ifdef CONFIG_DRM_MSM_DSI_20NM_PHY
        { .compatible = "qcom,dsi-phy-20nm",

diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
index 109d767a476b7a33ff387b0c6aadab68bce558c7..4953459edd636363614ecad85654614fc95cfa1d 100644 (file)
--- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
+++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
@@ -42,6 +42,7 @@ extern const struct msm_dsi_phy_cfg dsi_phy_28nm_hpm_cfgs;
 extern const struct msm_dsi_phy_cfg dsi_phy_28nm_hpm_famb_cfgs;
 extern const struct msm_dsi_phy_cfg dsi_phy_28nm_lp_cfgs;
 extern const struct msm_dsi_phy_cfg dsi_phy_28nm_8226_cfgs;
+extern const struct msm_dsi_phy_cfg dsi_phy_28nm_8937_cfgs;
 extern const struct msm_dsi_phy_cfg dsi_phy_28nm_8960_cfgs;
 extern const struct msm_dsi_phy_cfg dsi_phy_20nm_cfgs;
 extern const struct msm_dsi_phy_cfg dsi_phy_14nm_cfgs;

diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c
index db99526d11df7933a7cebd74840acd7f34c56187..1383e3a4e0500178ba2fc7f7af16d5a67b975520 100644 (file)
--- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c
+++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c
@@ -936,3 +936,21 @@ const struct msm_dsi_phy_cfg dsi_phy_28nm_8226_cfgs = {
        .num_dsi_phy = 1,
        .quirks = DSI_PHY_28NM_QUIRK_PHY_8226,
 };
+
+const struct msm_dsi_phy_cfg dsi_phy_28nm_8937_cfgs = {
+       .has_phy_regulator = true,
+       .regulator_data = dsi_phy_28nm_regulators,
+       .num_regulators = ARRAY_SIZE(dsi_phy_28nm_regulators),
+       .ops = {
+               .enable = dsi_28nm_phy_enable,
+               .disable = dsi_28nm_phy_disable,
+               .pll_init = dsi_pll_28nm_init,
+               .save_pll_state = dsi_28nm_pll_save_state,
+               .restore_pll_state = dsi_28nm_pll_restore_state,
+       },
+       .min_pll_rate = VCO_MIN_RATE,
+       .max_pll_rate = VCO_MAX_RATE,
+       .io_start = { 0x1a94400, 0x1a96400 },
+       .num_dsi_phy = 2,
+       .quirks = DSI_PHY_28NM_QUIRK_PHY_LP,
+};