+++ /dev/null
-From f1740b1ab2703b2a057da7cf33b03297e0381aa0 Mon Sep 17 00:00:00 2001
-From: Tim Huang <Tim.Huang@amd.com>
-Date: Mon, 14 Aug 2023 15:13:04 +0800
-Subject: drm/amdgpu: skip fence GFX interrupts disable/enable for S0ix
-
-From: Tim Huang <Tim.Huang@amd.com>
-
-commit f1740b1ab2703b2a057da7cf33b03297e0381aa0 upstream.
-
-GFX v11.0.1 reported fence fallback timer expired issue on
-SDMA and GFX rings after S0ix resume. This is generated by
-EOP interrupts are disabled when S0ix suspend but fails to
-re-enable when resume because of the GFX is in GFXOFF.
-
-[ 203.349571] [drm] Fence fallback timer expired on ring sdma0
-[ 203.349572] [drm] Fence fallback timer expired on ring gfx_0.0.0
-[ 203.861635] [drm] Fence fallback timer expired on ring gfx_0.0.0
-
-For S0ix, GFX is in GFXOFF state, avoid to touch the GFX registers
-to configure the fence driver interrupts for rings that belong to GFX.
-The interrupts configuration will be restored by GFXOFF exit.
-
-Signed-off-by: Tim Huang <Tim.Huang@amd.com>
-Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
-Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-Cc: stable@vger.kernel.org
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 41 ++++++++++++++++++++++++++++--
- 1 file changed, 39 insertions(+), 2 deletions(-)
-
---- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
-+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
-@@ -535,6 +535,41 @@ int amdgpu_fence_driver_sw_init(struct a
- }
-
- /**
-+ * amdgpu_fence_need_ring_interrupt_restore - helper function to check whether
-+ * fence driver interrupts need to be restored.
-+ *
-+ * @ring: ring that to be checked
-+ *
-+ * Interrupts for rings that belong to GFX IP don't need to be restored
-+ * when the target power state is s0ix.
-+ *
-+ * Return true if need to restore interrupts, false otherwise.
-+ */
-+static bool amdgpu_fence_need_ring_interrupt_restore(struct amdgpu_ring *ring)
-+{
-+ struct amdgpu_device *adev = ring->adev;
-+ bool is_gfx_power_domain = false;
-+
-+ switch (ring->funcs->type) {
-+ case AMDGPU_RING_TYPE_SDMA:
-+ /* SDMA 5.x+ is part of GFX power domain so it's covered by GFXOFF */
-+ if (adev->ip_versions[SDMA0_HWIP][0] >= IP_VERSION(5, 0, 0))
-+ is_gfx_power_domain = true;
-+ break;
-+ case AMDGPU_RING_TYPE_GFX:
-+ case AMDGPU_RING_TYPE_COMPUTE:
-+ case AMDGPU_RING_TYPE_KIQ:
-+ case AMDGPU_RING_TYPE_MES:
-+ is_gfx_power_domain = true;
-+ break;
-+ default:
-+ break;
-+ }
-+
-+ return !(adev->in_s0ix && is_gfx_power_domain);
-+}
-+
-+/**
- * amdgpu_fence_driver_hw_fini - tear down the fence driver
- * for all possible rings.
- *
-@@ -562,7 +597,8 @@ void amdgpu_fence_driver_hw_fini(struct
- amdgpu_fence_driver_force_completion(ring);
-
- if (!drm_dev_is_unplugged(adev_to_drm(adev)) &&
-- ring->fence_drv.irq_src)
-+ ring->fence_drv.irq_src &&
-+ amdgpu_fence_need_ring_interrupt_restore(ring))
- amdgpu_irq_put(adev, ring->fence_drv.irq_src,
- ring->fence_drv.irq_type);
-
-@@ -619,7 +655,8 @@ void amdgpu_fence_driver_hw_init(struct
- continue;
-
- /* enable the interrupt */
-- if (ring->fence_drv.irq_src)
-+ if (ring->fence_drv.irq_src &&
-+ amdgpu_fence_need_ring_interrupt_restore(ring))
- amdgpu_irq_get(adev, ring->fence_drv.irq_src,
- ring->fence_drv.irq_type);
- }