net: stmmac: remove SGMII/RGMII/SMII interrupt handling

Now that the only use for the interrupt is to clear it and increment a
statistic counter (which is not that relevant anymore) remove all this
code and ensure that the interrupt remains disabled to avoid a stuck
interrupt.

dwmac-sun8i still uses this statistic counter, so it is inappropriate
for this patch to remove it.

Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Tested-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://patch.msgid.link/E1v9P68-0000000AolO-2W5s@rmk-PC.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h b/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h
index 0c011a47d5a3e98280a98d25b8ef3614684ae78c..8f3002d9de78b9e635683d561218a7b7f657311a 100644 (file)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h
@@ -38,10 +38,10 @@
 #define        GMAC_INT_DISABLE_PCSAN          BIT(2)
 #define        GMAC_INT_DISABLE_PMT            BIT(3)
 #define        GMAC_INT_DISABLE_TIMESTAMP      BIT(9)
-#define        GMAC_INT_DISABLE_PCS    (GMAC_INT_DISABLE_RGMII | \
-                                GMAC_INT_DISABLE_PCSLINK | \
+#define        GMAC_INT_DISABLE_PCS    (GMAC_INT_DISABLE_PCSLINK | \
                                 GMAC_INT_DISABLE_PCSAN)
-#define        GMAC_INT_DEFAULT_MASK   (GMAC_INT_DISABLE_TIMESTAMP | \
+#define        GMAC_INT_DEFAULT_MASK   (GMAC_INT_DISABLE_RGMII | \
+                                GMAC_INT_DISABLE_TIMESTAMP | \
                                 GMAC_INT_DISABLE_PCS)
 
 /* PMT Control and Status */

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
index 2c5ee59c3208648096662908078a28755f014f18..654331b411f4469b8be778bd0af8c3ec1622a3a4 100644 (file)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
@@ -263,13 +263,6 @@ static void dwmac1000_pmt(struct mac_device_info *hw, unsigned long mode)
        writel(pmt, ioaddr + GMAC_PMT);
 }
 
-/* RGMII or SMII interface */
-static void dwmac1000_rgsmii(void __iomem *ioaddr, struct stmmac_extra_stats *x)
-{
-       readl(ioaddr + GMAC_RGSMIIIS);
-       x->irq_rgmii_n++;
-}
-
 static int dwmac1000_irq_status(struct mac_device_info *hw,
                                struct stmmac_extra_stats *x)
 {
@@ -311,9 +304,6 @@ static int dwmac1000_irq_status(struct mac_device_info *hw,
 
        dwmac_pcs_isr(ioaddr, GMAC_PCS_BASE, intr_status, x);
 
-       if (intr_status & PCS_RGSMIIIS_IRQ)
-               dwmac1000_rgsmii(ioaddr, x);
-
        return ret;
 }
 

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
index 3dec1a264cf60995cb4aeb2bd9092e137fe6a45e..6dd84b6544cc0ea233406b4cf24b46f23046ff01 100644 (file)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
@@ -106,8 +106,7 @@
 #define GMAC_INT_LPI_EN                        BIT(5)
 #define GMAC_INT_TSIE                  BIT(12)
 
-#define        GMAC_PCS_IRQ_DEFAULT    (GMAC_INT_RGSMIIS | GMAC_INT_PCS_LINK | \
-                                GMAC_INT_PCS_ANE)
+#define        GMAC_PCS_IRQ_DEFAULT    (GMAC_INT_PCS_LINK | GMAC_INT_PCS_ANE)
 
 #define        GMAC_INT_DEFAULT_ENABLE (GMAC_INT_PMT_EN | GMAC_INT_LPI_EN | \
                                 GMAC_INT_TSIE)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
index 8a19df7b05775da1ecc4299dcd58110e69a513dc..bff4c371c1d26103a93fa6d58304a9f6e8347b95 100644 (file)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
@@ -589,13 +589,6 @@ static void dwmac4_ctrl_ane(struct stmmac_priv *priv, bool ane, bool srgmi_ral,
        dwmac_ctrl_ane(priv->ioaddr, GMAC_PCS_BASE, ane, srgmi_ral, loopback);
 }
 
-/* RGMII or SMII interface */
-static void dwmac4_phystatus(void __iomem *ioaddr, struct stmmac_extra_stats *x)
-{
-       readl(ioaddr + GMAC_PHYIF_CONTROL_STATUS);
-       x->irq_rgmii_n++;
-}
-
 static int dwmac4_irq_mtl_status(struct stmmac_priv *priv,
                                 struct mac_device_info *hw, u32 chan)
 {
@@ -667,8 +660,6 @@ static int dwmac4_irq_status(struct mac_device_info *hw,
        }
 
        dwmac_pcs_isr(ioaddr, GMAC_PCS_BASE, intr_status, x);
-       if (intr_status & PCS_RGSMIIIS_IRQ)
-               dwmac4_phystatus(ioaddr, x);
 
        return ret;
 }