4.4-stable patches

added patches:
	drm-i915-dsi-do-not-clear-dpounit_clock_gate_disable-from-vlv_init_display_clock_gating.patch
	libceph-use-bug-instead-of-bug_on-1.patch

diff --git a/queue-4.4/drm-i915-dsi-do-not-clear-dpounit_clock_gate_disable-from-vlv_init_display_clock_gating.patch b/queue-4.4/drm-i915-dsi-do-not-clear-dpounit_clock_gate_disable-from-vlv_init_display_clock_gating.patch
new file mode 100644 (file)
index 0000000..42dc6da
--- /dev/null
+++ b/queue-4.4/drm-i915-dsi-do-not-clear-dpounit_clock_gate_disable-from-vlv_init_display_clock_gating.patch
@@ -0,0 +1,68 @@
+rom bb98e72adaf9d19719aba35f802d4836f5d5176c Mon Sep 17 00:00:00 2001
+From: Hans de Goede <hdegoede@redhat.com>
+Date: Fri, 2 Dec 2016 15:29:04 +0100
+Subject: drm/i915/dsi: Do not clear DPOUNIT_CLOCK_GATE_DISABLE from vlv_init_display_clock_gating
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Hans de Goede <hdegoede@redhat.com>
+
+commit bb98e72adaf9d19719aba35f802d4836f5d5176c upstream.
+
+On my Cherrytrail CUBE iwork8 Air tablet PIPE-A would get stuck on loading
+i915 at boot 1 out of every 3 boots, resulting in a non functional LCD.
+Once the i915 driver has successfully loaded, the panel can be disabled /
+enabled without hitting this issue.
+
+The getting stuck is caused by vlv_init_display_clock_gating() clearing
+the DPOUNIT_CLOCK_GATE_DISABLE bit in DSPCLK_GATE_D when called from
+chv_pipe_power_well_ops.enable() on driver load, while a pipe is enabled
+driving the DSI LCD by the BIOS.
+
+Clearing this bit while DSI is in use is a known issue and
+intel_dsi_pre_enable() / intel_dsi_post_disable() already set / clear it
+as appropriate.
+
+This commit modifies vlv_init_display_clock_gating() to leave the
+DPOUNIT_CLOCK_GATE_DISABLE bit alone fixing the pipe getting stuck.
+
+Changes in v2:
+-Replace PIPE-A with "a pipe" or "the pipe" in the commit msg and
+comment
+
+Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97330
+Signed-off-by: Hans de Goede <hdegoede@redhat.com>
+Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
+Link: http://patchwork.freedesktop.org/patch/msgid/20161202142904.25613-1-hdegoede@redhat.com
+Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
+(cherry picked from commit 721d484563e1a51ada760089c490cbc47e909756)
+Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+Signed-off-by: River Zhou <riverzhou2000@163.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/i915/intel_pm.c |   13 ++++++++++++-
+ 1 file changed, 12 insertions(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/i915/intel_pm.c
++++ b/drivers/gpu/drm/i915/intel_pm.c
+@@ -6803,7 +6803,18 @@ static void ivybridge_init_clock_gating(
+ 
+ static void vlv_init_display_clock_gating(struct drm_i915_private *dev_priv)
+ {
+-      I915_WRITE(DSPCLK_GATE_D, VRHUNIT_CLOCK_GATE_DISABLE);
++        u32 val;
++
++        /*
++        * On driver load, a pipe may be active and driving a DSI display.
++        * Preserve DPOUNIT_CLOCK_GATE_DISABLE to avoid the pipe getting stuck
++        * (and never recovering) in this case. intel_dsi_post_disable() will
++        * clear it when we turn off the display.
++        */
++        val = I915_READ(DSPCLK_GATE_D);
++        val &= DPOUNIT_CLOCK_GATE_DISABLE;
++        val |= VRHUNIT_CLOCK_GATE_DISABLE;
++        I915_WRITE(DSPCLK_GATE_D, val);
+ 
+       /*
+        * Disable trickle feed and enable pnd deadline calculation

diff --git a/queue-4.4/libceph-use-bug-instead-of-bug_on-1.patch b/queue-4.4/libceph-use-bug-instead-of-bug_on-1.patch
new file mode 100644 (file)
index 0000000..0f176a4
--- /dev/null
+++ b/queue-4.4/libceph-use-bug-instead-of-bug_on-1.patch
@@ -0,0 +1,38 @@
+From d24cdcd3e40a6825135498e11c20c7976b9bf545 Mon Sep 17 00:00:00 2001
+From: Arnd Bergmann <arnd@arndb.de>
+Date: Mon, 16 Jan 2017 12:06:09 +0100
+Subject: libceph: use BUG() instead of BUG_ON(1)
+
+From: Arnd Bergmann <arnd@arndb.de>
+
+commit d24cdcd3e40a6825135498e11c20c7976b9bf545 upstream.
+
+I ran into this compile warning, which is the result of BUG_ON(1)
+not always leading to the compiler treating the code path as
+unreachable:
+
+    include/linux/ceph/osdmap.h: In function 'ceph_can_shift_osds':
+    include/linux/ceph/osdmap.h:62:1: error: control reaches end of non-void function [-Werror=return-type]
+
+Using BUG() here avoids the warning.
+
+Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+Signed-off-by: Ilya Dryomov <idryomov@gmail.com>
+Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ include/linux/ceph/osdmap.h |    2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/include/linux/ceph/osdmap.h
++++ b/include/linux/ceph/osdmap.h
+@@ -49,7 +49,7 @@ static inline bool ceph_can_shift_osds(s
+       case CEPH_POOL_TYPE_EC:
+               return false;
+       default:
+-              BUG_ON(1);
++              BUG();
+       }
+ }
+ 

diff --git a/queue-4.4/series b/queue-4.4/series
index 4518896c766bf7cc30acce5c527ce0e95dc6e2bf..a03780ce7c57c095c7754face128801218ace2bb 100644 (file)
--- a/queue-4.4/series
+++ b/queue-4.4/series
@@ -30,3 +30,5 @@ drm-edid-add-edid_quirk_force_8bpc-quirk-for-rotel-rsx-1058.patch
 drm-ttm-make-sure-bos-being-swapped-out-are-cacheable.patch
 drm-atomic-fix-an-error-code-in-mode_fixup.patch
 fakelb-fix-schedule-while-atomic.patch
+drm-i915-dsi-do-not-clear-dpounit_clock_gate_disable-from-vlv_init_display_clock_gating.patch
+libceph-use-bug-instead-of-bug_on-1.patch