4.15-stable patches

added patches:
	scsi-megaraid_sas-do-not-use-32-bit-atomic-request-descriptor-for-ventura-controllers.patch

diff --git a/queue-4.15/scsi-megaraid_sas-do-not-use-32-bit-atomic-request-descriptor-for-ventura-controllers.patch b/queue-4.15/scsi-megaraid_sas-do-not-use-32-bit-atomic-request-descriptor-for-ventura-controllers.patch
new file mode 100644 (file)
index 0000000..8bdca81
--- /dev/null
+++ b/queue-4.15/scsi-megaraid_sas-do-not-use-32-bit-atomic-request-descriptor-for-ventura-controllers.patch
@@ -0,0 +1,106 @@
+From 9ff97fa8db94caeab59a3c5401e975df468b4d8e Mon Sep 17 00:00:00 2001
+From: Shivasharan S <shivasharan.srikanteshwara@broadcom.com>
+Date: Wed, 14 Feb 2018 00:10:52 -0800
+Subject: scsi: megaraid_sas: Do not use 32-bit atomic request descriptor for Ventura controllers
+
+From: Shivasharan S <shivasharan.srikanteshwara@broadcom.com>
+
+commit 9ff97fa8db94caeab59a3c5401e975df468b4d8e upstream.
+
+Problem Statement: Sending I/O through 32 bit descriptors to Ventura series of
+controller results in IO timeout on certain conditions.
+
+This error only occurs on systems with high I/O activity on Ventura series
+controllers.
+
+Changes in this patch will prevent driver from using 32 bit descriptor and use
+64 bit Descriptors.
+
+Cc: <stable@vger.kernel.org>
+Signed-off-by: Kashyap Desai <kashyap.desai@broadcom.com>
+Signed-off-by: Shivasharan S <shivasharan.srikanteshwara@broadcom.com>
+Reviewed-by: Hannes Reinecke <hare@suse.com>
+Reviewed-by: Tomas Henzl <thenzl@redhat.com>
+Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/scsi/megaraid/megaraid_sas_fusion.c |   42 +++++++++-------------------
+ 1 file changed, 14 insertions(+), 28 deletions(-)
+
+--- a/drivers/scsi/megaraid/megaraid_sas_fusion.c
++++ b/drivers/scsi/megaraid/megaraid_sas_fusion.c
+@@ -216,36 +216,30 @@ inline void megasas_return_cmd_fusion(st
+ /**
+  * megasas_fire_cmd_fusion -  Sends command to the FW
+  * @instance:                 Adapter soft state
+- * @req_desc:                 32bit or 64bit Request descriptor
++ * @req_desc:                 64bit Request descriptor
+  *
+- * Perform PCI Write. Ventura supports 32 bit Descriptor.
+- * Prior to Ventura (12G) MR controller supports 64 bit Descriptor.
++ * Perform PCI Write.
+  */
+ 
+ static void
+ megasas_fire_cmd_fusion(struct megasas_instance *instance,
+               union MEGASAS_REQUEST_DESCRIPTOR_UNION *req_desc)
+ {
+-      if (instance->adapter_type == VENTURA_SERIES)
+-              writel(le32_to_cpu(req_desc->u.low),
+-                      &instance->reg_set->inbound_single_queue_port);
+-      else {
+ #if defined(writeq) && defined(CONFIG_64BIT)
+-              u64 req_data = (((u64)le32_to_cpu(req_desc->u.high) << 32) |
+-                              le32_to_cpu(req_desc->u.low));
++      u64 req_data = (((u64)le32_to_cpu(req_desc->u.high) << 32) |
++              le32_to_cpu(req_desc->u.low));
+ 
+-              writeq(req_data, &instance->reg_set->inbound_low_queue_port);
++      writeq(req_data, &instance->reg_set->inbound_low_queue_port);
+ #else
+-              unsigned long flags;
+-              spin_lock_irqsave(&instance->hba_lock, flags);
+-              writel(le32_to_cpu(req_desc->u.low),
+-                      &instance->reg_set->inbound_low_queue_port);
+-              writel(le32_to_cpu(req_desc->u.high),
+-                      &instance->reg_set->inbound_high_queue_port);
+-              mmiowb();
+-              spin_unlock_irqrestore(&instance->hba_lock, flags);
++      unsigned long flags;
++      spin_lock_irqsave(&instance->hba_lock, flags);
++      writel(le32_to_cpu(req_desc->u.low),
++              &instance->reg_set->inbound_low_queue_port);
++      writel(le32_to_cpu(req_desc->u.high),
++              &instance->reg_set->inbound_high_queue_port);
++      mmiowb();
++      spin_unlock_irqrestore(&instance->hba_lock, flags);
+ #endif
+-      }
+ }
+ 
+ /**
+@@ -982,7 +976,6 @@ megasas_ioc_init_fusion(struct megasas_i
+       const char *sys_info;
+       MFI_CAPABILITIES *drv_ops;
+       u32 scratch_pad_2;
+-      unsigned long flags;
+       struct timeval tv;
+       bool cur_fw_64bit_dma_capable;
+ 
+@@ -1121,14 +1114,7 @@ megasas_ioc_init_fusion(struct megasas_i
+                       break;
+       }
+ 
+-      /* For Ventura also IOC INIT required 64 bit Descriptor write. */
+-      spin_lock_irqsave(&instance->hba_lock, flags);
+-      writel(le32_to_cpu(req_desc.u.low),
+-             &instance->reg_set->inbound_low_queue_port);
+-      writel(le32_to_cpu(req_desc.u.high),
+-             &instance->reg_set->inbound_high_queue_port);
+-      mmiowb();
+-      spin_unlock_irqrestore(&instance->hba_lock, flags);
++      megasas_fire_cmd_fusion(instance, &req_desc);
+ 
+       wait_and_poll(instance, cmd, MFI_POLL_TIMEOUT_SECS);
+