aarch64: Expand maximum number of operands from 5 to 6

Given the introduction of the new Armv9.4-a `sysp' insn using the
following syntax:

	sysp #<op1>, <Cn>, <Cm>, #<op2>{, <Xt1>, <Xt2>}

and by extension the need to encode 6 assembly operands, extend
Binutils to handle instructions taking 6 operands, up from a previous
maximum of 5.

diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index 7b7b15ae1a2bfe38c15a3c0974d931e4330e2f1d..554e4e14aec3c6aafccfc0450f9c7fc604c922b5 100644 (file)
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -1075,7 +1075,7 @@ enum err_type
 };
 
 /* Maximum number of operands an instruction can have.  */
-#define AARCH64_MAX_OPND_NUM 6
+#define AARCH64_MAX_OPND_NUM 7
 /* Maximum number of qualifier sequences an instruction can have.  */
 #define AARCH64_MAX_QLF_SEQ_NUM 10
 /* Operand qualifier typedef; optimized for the size.  */

diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index 27550fd1c8b8d207a381d0d6d0e4dfb2d6542332..47c25d59eeda730b0fb052494edf915176437f0f 100644 (file)
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -34,6 +34,7 @@
 #define OP3(a,b,c) {OPND(a), OPND(b), OPND(c)}
 #define OP4(a,b,c,d) {OPND(a), OPND(b), OPND(c), OPND(d)}
 #define OP5(a,b,c,d,e) {OPND(a), OPND(b), OPND(c), OPND(d), OPND(e)}
+#define OP6(a,b,c,d,e,f) {OPND(a), OPND(b), OPND(c), OPND(d), OPND(e), OPND(f)}
 
 #define QLF(x) AARCH64_OPND_QLF_##x
 #define QLF1(a) {QLF(a)}
@@ -41,6 +42,7 @@
 #define QLF3(a,b,c) {QLF(a), QLF(b), QLF(c)}
 #define QLF4(a,b,c,d) {QLF(a), QLF(b), QLF(c), QLF(d)}
 #define QLF5(a,b,c,d,e) {QLF(a), QLF(b), QLF(c), QLF(d), QLF(e)}
+#define QLF6(a,b,c,d,e) {QLF(a), QLF(b), QLF(c), QLF(d), QLF(e), QLF(f)}
 
 /* Qualifiers list.  */