drm/amd/display: Notify display idle on D3

[Why & How]
Display idle notification shall
be sent by driver on D3 entry. Implement
notification to DMUB and PMFW.

Reviewed-by: Duncan Ma <duncan.ma@amd.com>
Signed-off-by: Duncan Ma <Duncan.Ma@amd.com>
Signed-off-by: Ivan Lipski <ivan.lipski@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index cee45fe7cec9bac40734755323431c9dc7eb3c49..c31f7f8e409f2f82838abb19f2727d2b47987dce 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -5547,6 +5547,15 @@ void dc_set_power_state(struct dc *dc, enum dc_acpi_cm_power_state power_state)
                        dc->hwss.init_sys_ctx(dc->hwseq, dc, &dc->vm_pa_config);
                }
                break;
+       case DC_ACPI_CM_POWER_STATE_D3:
+               if (dc->caps.ips_support)
+                       dc_dmub_srv_notify_fw_dc_power_state(dc->ctx->dmub_srv, DC_ACPI_CM_POWER_STATE_D3);
+
+               if (dc->caps.ips_v2_support) {
+                       if (dc->clk_mgr->funcs->set_low_power_state)
+                               dc->clk_mgr->funcs->set_low_power_state(dc->clk_mgr);
+               }
+               break;
        default:
                ASSERT(dc->current_state->stream_count == 0);
                dc_dmub_srv_notify_fw_dc_power_state(dc->ctx->dmub_srv, power_state);

diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index a160671d2a01788721334909669f8f98ac4ec37a..aa1b976cf40de980433522c22479ed7289904af4 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -311,6 +311,7 @@ struct dc_caps {
        bool dmcub_support;
        bool zstate_support;
        bool ips_support;
+       bool ips_v2_support;
        uint32_t num_of_internal_disp;
        enum dp_protocol_version max_dp_protocol_version;
        unsigned int mall_size_per_mem_channel;