--- /dev/null
+From 262de94a3a7ef23c326534b3d9483602b7af841e Mon Sep 17 00:00:00 2001
+From: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
+Date: Thu, 27 Mar 2025 11:56:04 -0700
+Subject: drm/xe: Ensure fixed_slice_mode gets set after ccs_mode change
+
+From: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
+
+commit 262de94a3a7ef23c326534b3d9483602b7af841e upstream.
+
+The RCU_MODE_FIXED_SLICE_CCS_MODE setting is not getting invoked
+in the gt reset path after the ccs_mode setting by the user.
+Add it to engine register update list (in hw_engine_setup_default_state())
+which ensures it gets set in the gt reset and engine reset paths.
+
+v2: Add register update to engine list to ensure it gets updated
+after engine reset also.
+
+Fixes: 0d97ecce16bd ("drm/xe: Enable Fixed CCS mode setting")
+Cc: stable@vger.kernel.org
+Signed-off-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
+Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
+Signed-off-by: Matthew Brost <matthew.brost@intel.com>
+Link: https://lore.kernel.org/r/20250327185604.18230-1-niranjana.vishwanathapura@intel.com
+(cherry picked from commit 12468e519f98e4d93370712e3607fab61df9dae9)
+Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/xe/xe_hw_engine.c | 12 ++++++------
+ 1 file changed, 6 insertions(+), 6 deletions(-)
+
+--- a/drivers/gpu/drm/xe/xe_hw_engine.c
++++ b/drivers/gpu/drm/xe/xe_hw_engine.c
+@@ -381,12 +381,6 @@ xe_hw_engine_setup_default_lrc_state(str
+ blit_cctl_val,
+ XE_RTP_ACTION_FLAG(ENGINE_BASE)))
+ },
+- /* Use Fixed slice CCS mode */
+- { XE_RTP_NAME("RCU_MODE_FIXED_SLICE_CCS_MODE"),
+- XE_RTP_RULES(FUNC(xe_hw_engine_match_fixed_cslice_mode)),
+- XE_RTP_ACTIONS(FIELD_SET(RCU_MODE, RCU_MODE_FIXED_SLICE_CCS_MODE,
+- RCU_MODE_FIXED_SLICE_CCS_MODE))
+- },
+ /* Disable WMTP if HW doesn't support it */
+ { XE_RTP_NAME("DISABLE_WMTP_ON_UNSUPPORTED_HW"),
+ XE_RTP_RULES(FUNC(xe_rtp_cfeg_wmtp_disabled)),
+@@ -454,6 +448,12 @@ hw_engine_setup_default_state(struct xe_
+ XE_RTP_ACTIONS(SET(CSFE_CHICKEN1(0), CS_PRIORITY_MEM_READ,
+ XE_RTP_ACTION_FLAG(ENGINE_BASE)))
+ },
++ /* Use Fixed slice CCS mode */
++ { XE_RTP_NAME("RCU_MODE_FIXED_SLICE_CCS_MODE"),
++ XE_RTP_RULES(FUNC(xe_hw_engine_match_fixed_cslice_mode)),
++ XE_RTP_ACTIONS(FIELD_SET(RCU_MODE, RCU_MODE_FIXED_SLICE_CCS_MODE,
++ RCU_MODE_FIXED_SLICE_CCS_MODE))
++ },
+ {}
+ };
+