#define CMD_READ_DUAL_IO_FAST 0xbb
#define CMD_READ_QUAD_OUTPUT_FAST 0x6b
#define CMD_READ_QUAD_IO_FAST 0xeb
+#define CMD_READ_OCTAL_OUTPUT_FAST 0x8B
#define CMD_READ_ID 0x9f
#define CMD_READ_STATUS 0x05
#define CMD_READ_STATUS1 0x35
#define RD_DUAL BIT(5) /* use Dual Read */
#define RD_QUADIO BIT(6) /* use Quad IO Read */
#define RD_DUALIO BIT(7) /* use Dual IO Read */
+#define RD_OCTAL BIT(8) /* use Octal Read */
#define RD_FULL (RD_QUAD | RD_DUAL | RD_QUADIO | RD_DUALIO)
};
flash->read_cmd = CMD_READ_ARRAY_FAST;
if (spi->mode & SPI_RX_SLOW) {
flash->read_cmd = CMD_READ_ARRAY_SLOW;
+ } else if (spi->mode & SPI_RX_OCTAL && info->flags & RD_OCTAL) {
+ flash->read_cmd = CMD_READ_OCTAL_OUTPUT_FAST;
} else if (spi->mode & SPI_RX_QUAD && info->flags & RD_QUAD) {
flash->read_cmd = CMD_READ_QUAD_OUTPUT_FAST;
if (((JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SPANSION) &&
case 4:
mode |= SPI_RX_QUAD;
break;
+ case 8:
+ mode |= SPI_RX_OCTAL;
+ break;
default:
warn_non_spl("spi-rx-bus-width %d not supported\n", value);
break;
#define SPI_RX_FAST BIT(1) /* receive with 1 wire fast */
#define SPI_RX_DUAL BIT(2) /* receive with 2 wires */
#define SPI_RX_QUAD BIT(3) /* receive with 4 wires */
+#define SPI_RX_OCTAL BIT(4)
/* Header byte that marks the start of the message */
#define SPI_PREAMBLE_END_BYTE 0xec