]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
arm64: dts: ti: k3-am62p-j722s-common-main: move audio_refclk here
authorMichael Walle <mwalle@kernel.org>
Mon, 3 Nov 2025 15:28:18 +0000 (16:28 +0100)
committerVignesh Raghavendra <vigneshr@ti.com>
Thu, 6 Nov 2025 06:18:28 +0000 (11:48 +0530)
Since commit 9dee9cb2df08 ("arm64: dts: ti: k3-j722s-main: fix the audio
refclk source") the clock nodes of the am62p and j722 are the same. Move
them into the commit dtsi.

Please note, that for the j722s the nodes are renamed from clock@ to
clock-controller@.

Suggested-by: Udit Kumar <u-kumar1@ti.com>
Signed-off-by: Michael Walle <mwalle@kernel.org>
Link: https://patch.msgid.link/20251103152826.1608309-1-mwalle@kernel.org
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
arch/arm64/boot/dts/ti/k3-j722s-main.dtsi

index 0c05bcf1d7768216127b94eb10a166b79a9955c4..3cf7c2b3ce2ddd1516e67578043a9ff102a4a169 100644 (file)
                #size-cells = <1>;
                ranges = <0x00 0x00 0x00100000 0x20000>;
 
+               audio_refclk0: clock-controller@82e0 {
+                       compatible = "ti,am62-audio-refclk";
+                       reg = <0x82e0 0x4>;
+                       clocks = <&k3_clks 157 0>;
+                       assigned-clocks = <&k3_clks 157 0>;
+                       assigned-clock-parents = <&k3_clks 157 16>;
+                       #clock-cells = <0>;
+               };
+
+               audio_refclk1: clock-controller@82e4 {
+                       compatible = "ti,am62-audio-refclk";
+                       reg = <0x82e4 0x4>;
+                       clocks = <&k3_clks 157 18>;
+                       assigned-clocks = <&k3_clks 157 18>;
+                       assigned-clock-parents = <&k3_clks 157 34>;
+                       #clock-cells = <0>;
+               };
+
                phy_gmii_sel: phy@4044 {
                        compatible = "ti,am654-phy-gmii-sel";
                        reg = <0x4044 0x8>;
index 908cc0760e7d87d7db1dee43a22d85496488bb6e..13d32cbff1867617808b86dc446e677b91685e77 100644 (file)
        ti,interrupt-ranges = <5 69 35>;
 };
 
-&main_conf {
-       audio_refclk0: clock-controller@82e0 {
-               compatible = "ti,am62-audio-refclk";
-               reg = <0x82e0 0x4>;
-               clocks = <&k3_clks 157 0>;
-               assigned-clocks = <&k3_clks 157 0>;
-               assigned-clock-parents = <&k3_clks 157 16>;
-               #clock-cells = <0>;
-       };
-
-       audio_refclk1: clock-controller@82e4 {
-               compatible = "ti,am62-audio-refclk";
-               reg = <0x82e4 0x4>;
-               clocks = <&k3_clks 157 18>;
-               assigned-clocks = <&k3_clks 157 18>;
-               assigned-clock-parents = <&k3_clks 157 34>;
-               #clock-cells = <0>;
-       };
-};
-
 &main_gpio0 {
        gpio-ranges = <&main_pmx0 0 0 32>, <&main_pmx0 32 33 38>,
                        <&main_pmx0 70 72 22>;
index 7b7c25c2c6d9bc6684b4f8a78755182eb93e78e5..873415ec4fa37c8fed0342376fad8d91f0b8f431 100644 (file)
                mux-reg-masks = <0x00 0x3>, /* SERDES0 lane0 select */
                                <0x10 0x3>; /* SERDES1 lane0 select */
        };
-
-       audio_refclk0: clock@82e0 {
-               compatible = "ti,am62-audio-refclk";
-               reg = <0x82e0 0x4>;
-               clocks = <&k3_clks 157 0>;
-               assigned-clocks = <&k3_clks 157 0>;
-               assigned-clock-parents = <&k3_clks 157 16>;
-               #clock-cells = <0>;
-       };
-
-       audio_refclk1: clock@82e4 {
-               compatible = "ti,am62-audio-refclk";
-               reg = <0x82e4 0x4>;
-               clocks = <&k3_clks 157 18>;
-               assigned-clocks = <&k3_clks 157 18>;
-               assigned-clock-parents = <&k3_clks 157 34>;
-               #clock-cells = <0>;
-       };
 };
 
 &wkup_conf {