]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
drm/xe/pat: Consolidate PAT programming logic for pre-Xe2 and post-Xe2
authorMatt Roper <matthew.d.roper@intel.com>
Fri, 13 Jun 2025 21:47:53 +0000 (14:47 -0700)
committerMatt Roper <matthew.d.roper@intel.com>
Mon, 16 Jun 2025 15:58:59 +0000 (08:58 -0700)
Now that the PAT settings for the new special entries introduced by Xe2
are decided during early software init and left NULL on platforms they
don't apply to, there's no need to keep separate programming functions
for pre-Xe2 and post-Xe2 platforms.  Consolidate down to a single pair
of programming functions (mcr and non-mcr) that can be used on any
platform.

Reviewed-by: Tejas Upadhyay <tejas.upadhyay@intel.com>
Link: https://lore.kernel.org/r/20250613214751.792066-4-matthew.d.roper@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
drivers/gpu/drm/xe/xe_pat.c

index 31663ead78227f9dd8b7aab3c13cc5e4a1c010fb..2e7cb99ae87aa1f204e9341a2f58fba3aa319ac4 100644 (file)
@@ -163,21 +163,35 @@ u16 xe_pat_index_get_coh_mode(struct xe_device *xe, u16 pat_index)
 static void program_pat(struct xe_gt *gt, const struct xe_pat_table_entry table[],
                        int n_entries)
 {
+       struct xe_device *xe = gt_to_xe(gt);
+
        for (int i = 0; i < n_entries; i++) {
                struct xe_reg reg = XE_REG(_PAT_INDEX(i));
 
                xe_mmio_write32(&gt->mmio, reg, table[i].value);
        }
+
+       if (xe->pat.pat_ats)
+               xe_mmio_write32(&gt->mmio, XE_REG(_PAT_ATS), xe->pat.pat_ats->value);
+       if (xe->pat.pat_pta)
+               xe_mmio_write32(&gt->mmio, XE_REG(_PAT_PTA), xe->pat.pat_pta->value);
 }
 
 static void program_pat_mcr(struct xe_gt *gt, const struct xe_pat_table_entry table[],
                            int n_entries)
 {
+       struct xe_device *xe = gt_to_xe(gt);
+
        for (int i = 0; i < n_entries; i++) {
                struct xe_reg_mcr reg_mcr = XE_REG_MCR(_PAT_INDEX(i));
 
                xe_gt_mcr_multicast_write(gt, reg_mcr, table[i].value);
        }
+
+       if (xe->pat.pat_ats)
+               xe_gt_mcr_multicast_write(gt, XE_REG_MCR(_PAT_ATS), xe->pat.pat_ats->value);
+       if (xe->pat.pat_pta)
+               xe_gt_mcr_multicast_write(gt, XE_REG_MCR(_PAT_PTA), xe->pat.pat_pta->value);
 }
 
 static void xelp_dump(struct xe_gt *gt, struct drm_printer *p)
@@ -304,32 +318,6 @@ static const struct xe_pat_ops xelpg_pat_ops = {
        .dump = xelpg_dump,
 };
 
-static void xe2lpg_program_pat(struct xe_gt *gt, const struct xe_pat_table_entry table[],
-                              int n_entries)
-{
-       struct xe_device *xe = gt_to_xe(gt);
-
-       program_pat_mcr(gt, table, n_entries);
-
-       if (xe->pat.pat_ats)
-               xe_gt_mcr_multicast_write(gt, XE_REG_MCR(_PAT_ATS), xe->pat.pat_ats->value);
-       if (xe->pat.pat_pta)
-               xe_gt_mcr_multicast_write(gt, XE_REG_MCR(_PAT_PTA), xe->pat.pat_pta->value);
-}
-
-static void xe2lpm_program_pat(struct xe_gt *gt, const struct xe_pat_table_entry table[],
-                              int n_entries)
-{
-       struct xe_device *xe = gt_to_xe(gt);
-
-       program_pat(gt, table, n_entries);
-
-       if (xe->pat.pat_ats)
-               xe_mmio_write32(&gt->mmio, XE_REG(_PAT_ATS), xe->pat.pat_ats->value);
-       if (xe->pat.pat_pta)
-               xe_mmio_write32(&gt->mmio, XE_REG(_PAT_PTA), xe->pat.pat_pta->value);
-}
-
 static void xe2_dump(struct xe_gt *gt, struct drm_printer *p)
 {
        struct xe_device *xe = gt_to_xe(gt);
@@ -382,8 +370,8 @@ static void xe2_dump(struct xe_gt *gt, struct drm_printer *p)
 }
 
 static const struct xe_pat_ops xe2_pat_ops = {
-       .program_graphics = xe2lpg_program_pat,
-       .program_media = xe2lpm_program_pat,
+       .program_graphics = program_pat_mcr,
+       .program_media = program_pat,
        .dump = xe2_dump,
 };