powerpc: Fix return code of strcasecmp for unaligned inputs

If the input values are unaligned and if there are null characters in the
memory before the starting address of the input values, strcasecmp
gives incorrect return code. Fixed it by adding mask the bits that
are not part of the string.

diff --git a/ChangeLog b/ChangeLog
index 66627f1fb5c555a002f1614e19bba19086f55902..cc875c5120e71716bf0ec607112f984fbf0af5dc 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,9 @@
+2016-07-05  Rajalakshmi Srinivasaraghavan  <raji@linux.vnet.ibm.com>
+
+       [BZ #20327]
+       * sysdeps/powerpc/powerpc64/power8/strcasecmp.S: Mask bits that
+       are not part of the string.
+
 2016-07-05  Adhemerval Zanella  <adhemerval.zanella@linaro.org>
 
        * nptl/tst-cancel4-common.c (do_test): Add temporary fifo creation.

diff --git a/sysdeps/powerpc/powerpc64/power8/strcasecmp.S b/sysdeps/powerpc/powerpc64/power8/strcasecmp.S
index 63f62171d917125a9d969d5b3ba5abdd15f6715c..c83dc524e83df6d3beaf5d830dd2936d9e487cd8 100644 (file)
--- a/sysdeps/powerpc/powerpc64/power8/strcasecmp.S
+++ b/sysdeps/powerpc/powerpc64/power8/strcasecmp.S
@@ -40,11 +40,20 @@
        vsel    v5, v7, v5, v8; \
        vcmpequb.       v7, v5, v4;
 
-/* Get 16 bytes for unaligned case.  */
+/*
+ * Get 16 bytes for unaligned case.
+ * reg1: Vector to hold next 16 bytes.
+ * reg2: Address to read from.
+ * reg3: Permute control vector.
+ * v8: Tmp vector used to mask unwanted bytes.
+ * v9: Tmp vector,0 when null is found on first 16 bytes
+ */
 #ifdef __LITTLE_ENDIAN__
 #define GET16BYTES(reg1, reg2, reg3) \
        lvx     reg1, 0, reg2; \
-       vcmpequb.       v8, v0, reg1; \
+       vspltisb        v8, -1; \
+       vperm   v8, v8, reg1, reg3; \
+       vcmpequb.       v8, v0, v8; \
        beq     cr6, 1f; \
        vspltisb        v9, 0; \
        b       2f; \
@@ -57,7 +66,9 @@
 #else
 #define GET16BYTES(reg1, reg2, reg3) \
        lvx     reg1, 0, reg2; \
-       vcmpequb.       v8, v0, reg1; \
+       vspltisb         v8, -1; \
+       vperm   v8, reg1, v8,  reg3; \
+       vcmpequb.       v8, v0, v8; \
        beq     cr6, 1f; \
        vspltisb        v9, 0; \
        b       2f; \