};
pinctrl_flexspi1: flexspi1grp {
- fsl,pins = <IMX95_PAD_SD3_CLK__FLEXSPI1_A_SCLK 0x11e>,
- <IMX95_PAD_SD3_CMD__FLEXSPI1_A_SS0_B 0x11e>,
- <IMX95_PAD_SD3_DATA0__FLEXSPI1_A_DATA_BIT0 0x11e>,
- <IMX95_PAD_SD3_DATA1__FLEXSPI1_A_DATA_BIT1 0x11e>,
- <IMX95_PAD_SD3_DATA2__FLEXSPI1_A_DATA_BIT2 0x11e>,
- <IMX95_PAD_SD3_DATA3__FLEXSPI1_A_DATA_BIT3 0x11e>;
+ fsl,pins = <IMX95_PAD_SD3_CLK__FLEXSPI1_A_SCLK 0x19e>,
+ <IMX95_PAD_SD3_CMD__FLEXSPI1_A_SS0_B 0x19e>,
+ <IMX95_PAD_SD3_DATA0__FLEXSPI1_A_DATA_BIT0 0x19e>,
+ <IMX95_PAD_SD3_DATA1__FLEXSPI1_A_DATA_BIT1 0x19e>,
+ <IMX95_PAD_SD3_DATA2__FLEXSPI1_A_DATA_BIT2 0x19e>,
+ <IMX95_PAD_SD3_DATA3__FLEXSPI1_A_DATA_BIT3 0x19e>;
};
pinctrl_gpio1: gpio1grp {