5.4-stable patches

added patches:
	pci-aardvark-clear-all-msis-at-setup.patch
	pci-aardvark-fix-reading-msi-interrupt-number.patch

diff --git a/queue-5.4/pci-aardvark-clear-all-msis-at-setup.patch b/queue-5.4/pci-aardvark-clear-all-msis-at-setup.patch
new file mode 100644 (file)
index 0000000..3577dc8
--- /dev/null
+++ b/queue-5.4/pci-aardvark-clear-all-msis-at-setup.patch
@@ -0,0 +1,64 @@
+From 7d8dc1f7cd007a7ce94c5b4c20d63a8b8d6d7751 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>
+Date: Tue, 30 Nov 2021 18:29:06 +0100
+Subject: PCI: aardvark: Clear all MSIs at setup
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Pali Rohár <pali@kernel.org>
+
+commit 7d8dc1f7cd007a7ce94c5b4c20d63a8b8d6d7751 upstream.
+
+We already clear all the other interrupts (ISR0, ISR1, HOST_CTRL_INT).
+
+Define a new macro PCIE_MSI_ALL_MASK and do the same clearing for MSIs,
+to ensure that we don't start receiving spurious interrupts.
+
+Use this new mask in advk_pcie_handle_msi();
+
+Link: https://lore.kernel.org/r/20211130172913.9727-5-kabel@kernel.org
+Signed-off-by: Pali Rohár <pali@kernel.org>
+Signed-off-by: Marek Behún <kabel@kernel.org>
+Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/pci/controller/pci-aardvark.c |    6 ++++--
+ 1 file changed, 4 insertions(+), 2 deletions(-)
+
+--- a/drivers/pci/controller/pci-aardvark.c
++++ b/drivers/pci/controller/pci-aardvark.c
+@@ -108,6 +108,7 @@
+ #define PCIE_MSI_ADDR_HIGH_REG                        (CONTROL_BASE_ADDR + 0x54)
+ #define PCIE_MSI_STATUS_REG                   (CONTROL_BASE_ADDR + 0x58)
+ #define PCIE_MSI_MASK_REG                     (CONTROL_BASE_ADDR + 0x5C)
++#define     PCIE_MSI_ALL_MASK                 GENMASK(31, 0)
+ #define PCIE_MSI_PAYLOAD_REG                  (CONTROL_BASE_ADDR + 0x9C)
+ #define     PCIE_MSI_DATA_MASK                        GENMASK(15, 0)
+ 
+@@ -561,6 +562,7 @@ static void advk_pcie_setup_hw(struct ad
+       advk_writel(pcie, reg, PCIE_CORE_CTRL2_REG);
+ 
+       /* Clear all interrupts */
++      advk_writel(pcie, PCIE_MSI_ALL_MASK, PCIE_MSI_STATUS_REG);
+       advk_writel(pcie, PCIE_ISR0_ALL_MASK, PCIE_ISR0_REG);
+       advk_writel(pcie, PCIE_ISR1_ALL_MASK, PCIE_ISR1_REG);
+       advk_writel(pcie, PCIE_IRQ_ALL_MASK, HOST_CTRL_INT_STATUS_REG);
+@@ -573,7 +575,7 @@ static void advk_pcie_setup_hw(struct ad
+       advk_writel(pcie, PCIE_ISR1_ALL_MASK, PCIE_ISR1_MASK_REG);
+ 
+       /* Unmask all MSIs */
+-      advk_writel(pcie, 0, PCIE_MSI_MASK_REG);
++      advk_writel(pcie, ~(u32)PCIE_MSI_ALL_MASK, PCIE_MSI_MASK_REG);
+ 
+       /* Enable summary interrupt for GIC SPI source */
+       reg = PCIE_IRQ_ALL_MASK & (~PCIE_IRQ_ENABLE_INTS_MASK);
+@@ -1374,7 +1376,7 @@ static void advk_pcie_handle_msi(struct
+ 
+       msi_mask = advk_readl(pcie, PCIE_MSI_MASK_REG);
+       msi_val = advk_readl(pcie, PCIE_MSI_STATUS_REG);
+-      msi_status = msi_val & ~msi_mask;
++      msi_status = msi_val & ((~msi_mask) & PCIE_MSI_ALL_MASK);
+ 
+       for (msi_idx = 0; msi_idx < MSI_IRQ_NUM; msi_idx++) {
+               if (!(BIT(msi_idx) & msi_status))

diff --git a/queue-5.4/pci-aardvark-fix-reading-msi-interrupt-number.patch b/queue-5.4/pci-aardvark-fix-reading-msi-interrupt-number.patch
new file mode 100644 (file)
index 0000000..d1fc539
--- /dev/null
+++ b/queue-5.4/pci-aardvark-fix-reading-msi-interrupt-number.patch
@@ -0,0 +1,62 @@
+From 805dfc18dd3d4dd97a987d4406593b5a225b1253 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>
+Date: Mon, 10 Jan 2022 02:49:57 +0100
+Subject: PCI: aardvark: Fix reading MSI interrupt number
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Pali Rohár <pali@kernel.org>
+
+commit 805dfc18dd3d4dd97a987d4406593b5a225b1253 upstream.
+
+In advk_pcie_handle_msi() it is expected that when bit i in the W1C
+register PCIE_MSI_STATUS_REG is cleared, the PCIE_MSI_PAYLOAD_REG is
+updated to contain the MSI number corresponding to index i.
+
+Experiments show that this is not so, and instead PCIE_MSI_PAYLOAD_REG
+always contains the number of the last received MSI, overall.
+
+Do not read PCIE_MSI_PAYLOAD_REG register for determining MSI interrupt
+number. Since Aardvark already forbids more than 32 interrupts and uses
+own allocated hwirq numbers, the msi_idx already corresponds to the
+received MSI number.
+
+Link: https://lore.kernel.org/r/20220110015018.26359-3-kabel@kernel.org
+Fixes: 8c39d710363c ("PCI: aardvark: Add Aardvark PCI host controller driver")
+Signed-off-by: Pali Rohár <pali@kernel.org>
+Signed-off-by: Marek Behún <kabel@kernel.org>
+Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
+Signed-off-by: Marek Behún <kabel@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/pci/controller/pci-aardvark.c |   10 +++-------
+ 1 file changed, 3 insertions(+), 7 deletions(-)
+
+--- a/drivers/pci/controller/pci-aardvark.c
++++ b/drivers/pci/controller/pci-aardvark.c
+@@ -1372,7 +1372,7 @@ static void advk_pcie_remove_irq_domain(
+ static void advk_pcie_handle_msi(struct advk_pcie *pcie)
+ {
+       u32 msi_val, msi_mask, msi_status, msi_idx;
+-      u16 msi_data;
++      int virq;
+ 
+       msi_mask = advk_readl(pcie, PCIE_MSI_MASK_REG);
+       msi_val = advk_readl(pcie, PCIE_MSI_STATUS_REG);
+@@ -1382,13 +1382,9 @@ static void advk_pcie_handle_msi(struct
+               if (!(BIT(msi_idx) & msi_status))
+                       continue;
+ 
+-              /*
+-               * msi_idx contains bits [4:0] of the msi_data and msi_data
+-               * contains 16bit MSI interrupt number
+-               */
+               advk_writel(pcie, BIT(msi_idx), PCIE_MSI_STATUS_REG);
+-              msi_data = advk_readl(pcie, PCIE_MSI_PAYLOAD_REG) & PCIE_MSI_DATA_MASK;
+-              generic_handle_irq(msi_data);
++              virq = irq_find_mapping(pcie->msi_inner_domain, msi_idx);
++              generic_handle_irq(virq);
+       }
+ 
+       advk_writel(pcie, PCIE_ISR0_MSI_INT_PENDING,

diff --git a/queue-5.4/series b/queue-5.4/series
index 13199e37f3bfb543f010df3d947a5b253868265e..6692b79d9795b84804f133f96f88691515a436a8 100644 (file)
--- a/queue-5.4/series
+++ b/queue-5.4/series
@@ -49,3 +49,5 @@ alsa-pcm-fix-potential-ab-ba-lock-with-buffer_mutex-and-mmap_lock.patch
 tcp-make-sure-treq-af_specific-is-initialized.patch
 dm-fix-mempool-null-pointer-race-when-completing-io.patch
 dm-interlock-pending-dm_io-and-dm_wait_for_bios_completion.patch
+pci-aardvark-clear-all-msis-at-setup.patch
+pci-aardvark-fix-reading-msi-interrupt-number.patch