]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/mediatek: Fix destination alpha error in OVL
authorHsiao Chien Sung <shawn.sung@mediatek.com>
Wed, 19 Jun 2024 16:38:45 +0000 (00:38 +0800)
committerChun-Kuang Hu <chunkuang.hu@kernel.org>
Thu, 20 Jun 2024 13:57:35 +0000 (13:57 +0000)
The formula of Coverage alpha blending is:
dst.a = dst.a * (0xff - src.a * SCA / 0xff) / 0xff
      + src.a * SCA / 0xff

dst.a: destination alpha
src.a: pixel alpha
SCA  : plane alpha

When SCA = 0xff, the formula becomes:
dst.a = dst.a * (0xff - src.a) + src.a

This patch is to set the destination alpha (background) to 0xff:
- When dst.a = 0    (before), dst.a = src.a
- When dst.a = 0xff (after) , dst.a = 0xff * (0xff - src.a) + src.a

According to the fomula above:
- When src.a = 0   , dst.a = 0
- When src.a = 0xff, dst.a = 0xff
This two cases are just still correct. But when src.a is
between 0 and 0xff, the difference starts to appear

Fixes: 616443ca577e ("drm/mediatek: Move cmdq_reg info from struct mtk_ddp_comp to sub driver private data")
Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
Link: https://patchwork.kernel.org/project/dri-devel/patch/20240620-igt-v3-5-a9d62d2e2c7e@mediatek.com/
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
drivers/gpu/drm/mediatek/mtk_disp_ovl.c

index bd00e5e85deba00fe67b898436328ad45325e81a..693560fa34e8ba2f6734d5fa28b3d66ddb40ed86 100644 (file)
@@ -72,6 +72,8 @@
 #define        OVL_CON_VIRT_FLIP       BIT(9)
 #define        OVL_CON_HORZ_FLIP       BIT(10)
 
+#define OVL_COLOR_ALPHA                GENMASK(31, 24)
+
 static const u32 mt8173_formats[] = {
        DRM_FORMAT_XRGB8888,
        DRM_FORMAT_ARGB8888,
@@ -274,7 +276,13 @@ void mtk_ovl_config(struct device *dev, unsigned int w,
        if (w != 0 && h != 0)
                mtk_ddp_write_relaxed(cmdq_pkt, h << 16 | w, &ovl->cmdq_reg, ovl->regs,
                                      DISP_REG_OVL_ROI_SIZE);
-       mtk_ddp_write_relaxed(cmdq_pkt, 0x0, &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_ROI_BGCLR);
+
+       /*
+        * The background color must be opaque black (ARGB),
+        * otherwise the alpha blending will have no effect
+        */
+       mtk_ddp_write_relaxed(cmdq_pkt, OVL_COLOR_ALPHA, &ovl->cmdq_reg,
+                             ovl->regs, DISP_REG_OVL_ROI_BGCLR);
 
        mtk_ddp_write(cmdq_pkt, 0x1, &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_RST);
        mtk_ddp_write(cmdq_pkt, 0x0, &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_RST);