drm/xe/rtp: Maintain OA whitelists separately

OA registers are dynamically whitelisted (and again dewhitelisted) on OA
stream open/close. Maintaining OA whitelists separately from non-OA
register whitlists simplifies this management of OA register
whitelisting/dewhitelisting.

Fixes: 828a8eaf37c3 ("drm/xe/oa: Add MMIO trigger support")
Cc: stable@vger.kernel.org # v6.12+
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Link: https://patch.msgid.link/20260615224227.34880-3-ashutosh.dixit@intel.com
(cherry picked from commit c478244a9e2d14b3f1f92e8bd293919e554622a5)
Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>

diff --git a/drivers/gpu/drm/xe/xe_gt_debugfs.c b/drivers/gpu/drm/xe/xe_gt_debugfs.c
index f45306308cd66c87b261edaa8de532f6cc56499d..c38bcacb27e4a3bd6ff659a60daf689d5d90cc39 100644 (file)
--- a/drivers/gpu/drm/xe/xe_gt_debugfs.c
+++ b/drivers/gpu/drm/xe/xe_gt_debugfs.c
@@ -149,8 +149,10 @@ static int register_save_restore(struct xe_gt *gt, struct drm_printer *p)
        drm_printf(p, "\n");
 
        drm_printf(p, "Whitelist\n");
-       for_each_hw_engine(hwe, gt, id)
+       for_each_hw_engine(hwe, gt, id) {
                xe_reg_whitelist_dump(&hwe->reg_whitelist, p);
+               xe_reg_whitelist_dump(&hwe->oa_whitelist, p);
+       }
 
        return 0;
 }

diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
index 98265293f2dce2e2a9fec5d0a7af082447445992..55632ac4dfe7b84af8d974a395b898cc7fbf83c6 100644 (file)
--- a/drivers/gpu/drm/xe/xe_hw_engine.c
+++ b/drivers/gpu/drm/xe/xe_hw_engine.c
@@ -572,6 +572,8 @@ static void hw_engine_init_early(struct xe_gt *gt, struct xe_hw_engine *hwe,
        hw_engine_setup_default_state(hwe);
 
        xe_reg_sr_init(&hwe->reg_whitelist, hwe->name, gt_to_xe(gt));
+       xe_reg_sr_init(&hwe->oa_whitelist, hwe->name, gt_to_xe(gt));
+       xe_reg_sr_init(&hwe->oa_sr, hwe->name, gt_to_xe(gt));
        xe_reg_whitelist_process_engine(hwe);
 }
 

diff --git a/drivers/gpu/drm/xe/xe_hw_engine_types.h b/drivers/gpu/drm/xe/xe_hw_engine_types.h
index 2cf898e682f5544207247f59bd5cdea8d65256c9..84c097da9b6f214c03699d547ff46fce0341cb0c 100644 (file)
--- a/drivers/gpu/drm/xe/xe_hw_engine_types.h
+++ b/drivers/gpu/drm/xe/xe_hw_engine_types.h
@@ -130,6 +130,14 @@ struct xe_hw_engine {
         * @reg_whitelist: table with registers to be whitelisted
         */
        struct xe_reg_sr reg_whitelist;
+       /**
+        * @oa_whitelist: oa registers to be whitelisted
+        */
+       struct xe_reg_sr oa_whitelist;
+       /**
+        * @oa_sr: oa nonpriv whitelist registers, changed on oa stream open/close
+        */
+       struct xe_reg_sr oa_sr;
        /**
         * @reg_lrc: LRC workaround registers
         */

diff --git a/drivers/gpu/drm/xe/xe_reg_whitelist.c b/drivers/gpu/drm/xe/xe_reg_whitelist.c
index 2d8ddb57412c258fe5b303ec41c2890ad59c7182..6d642c2f6fd760102afd0e0e271bfb837abf803a 100644 (file)
--- a/drivers/gpu/drm/xe/xe_reg_whitelist.c
+++ b/drivers/gpu/drm/xe/xe_reg_whitelist.c
@@ -103,6 +103,9 @@ static const struct xe_rtp_table_sr register_whitelist = XE_RTP_TABLE_SR(
                         WHITELIST(VFLSKPD,
                                   RING_FORCE_TO_NONPRIV_ACCESS_RW))
        },
+);
+
+static const struct xe_rtp_table_sr oa_whitelist = XE_RTP_TABLE_SR(
 
 #define WHITELIST_DENY(r, f) WHITELIST(r, (f) | RING_FORCE_TO_NONPRIV_DENY)
 
@@ -206,6 +209,8 @@ void xe_reg_whitelist_process_engine(struct xe_hw_engine *hwe)
 
        xe_rtp_process_to_sr(&ctx, &register_whitelist, &hwe->reg_whitelist, false);
        whitelist_apply_to_hwe(hwe);
+
+       xe_rtp_process_to_sr(&ctx, &oa_whitelist, &hwe->oa_whitelist, false);
 }
 
 /**