mips: dts: realtek: Correct uart interrupt-parent

The uart interrupts on RTL838x chips do not lead to the CPU's interrupt
controller directly, but passes via the SoC interrupt controller. Update
the interrupt-parent property to fix this.

Signed-off-by: Sander Vanheule <sander@svanheule.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

diff --git a/arch/mips/boot/dts/realtek/rtl838x.dtsi b/arch/mips/boot/dts/realtek/rtl838x.dtsi
index 21fb584e63831264b5b33b72df5b5c0379abaf19..e3183a71765e70d0bc860723f725dc7dc6834dd1 100644 (file)
--- a/arch/mips/boot/dts/realtek/rtl838x.dtsi
+++ b/arch/mips/boot/dts/realtek/rtl838x.dtsi
@@ -46,7 +46,7 @@
 
                        clock-frequency = <200000000>;
 
-                       interrupt-parent = <&cpuintc>;
+                       interrupt-parent = <&intc>;
                        interrupts = <31>;
 
                        reg-io-width = <1>;
@@ -63,7 +63,7 @@
 
                        clock-frequency = <200000000>;
 
-                       interrupt-parent = <&cpuintc>;
+                       interrupt-parent = <&intc>;
                        interrupts = <30>;
 
                        reg-io-width = <1>;