Fix typo in chapter level for RISC-V attributes

The "RISC-V specific attributes" section should be at the same level
as "PowerPC-specific attributes".

gcc/ChangeLog:

	* doc/sourcebuild.texi: Fix chapter level.

Signed-off-by: Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>

diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi
index 760ff9559a657089c7f8047ca0431997e49ccda5..52357cc7aee9446ca1ec39b724efb4c97034ac89 100644 (file)
--- a/gcc/doc/sourcebuild.texi
+++ b/gcc/doc/sourcebuild.texi
@@ -2447,7 +2447,7 @@ PowerPC target pre-defines macro _ARCH_PWR9 which means the @code{-mcpu}
 setting is Power9 or later.
 @end table
 
-@subsection RISC-V specific attributes
+@subsubsection RISC-V specific attributes
 
 @table @code