clk: mediatek: mt8186-topckgen: Add GPU clock mux notifier

Following the changes done to MT8183, MT8192, MT8195, register a
clock notifier for MT8186, allowing safe clockrate updates for the
MFG PLL.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20221024102307.33722-11-angelogioacchino.delregno@collabora.com
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>

diff --git a/drivers/clk/mediatek/clk-mt8186-topckgen.c b/drivers/clk/mediatek/clk-mt8186-topckgen.c
index 62b5ff4a57234ea9daae96799bc676c379f46940..c2beda7ef976e6065f087bceb607f61e307b4627 100644 (file)
--- a/drivers/clk/mediatek/clk-mt8186-topckgen.c
+++ b/drivers/clk/mediatek/clk-mt8186-topckgen.c
@@ -689,6 +689,28 @@ static const struct of_device_id of_match_clk_mt8186_topck[] = {
        {}
 };
 
+/* Register mux notifier for MFG mux */
+static int clk_mt8186_reg_mfg_mux_notifier(struct device *dev, struct clk *clk)
+{
+       struct mtk_mux_nb *mfg_mux_nb;
+       int i;
+
+       mfg_mux_nb = devm_kzalloc(dev, sizeof(*mfg_mux_nb), GFP_KERNEL);
+       if (!mfg_mux_nb)
+               return -ENOMEM;
+
+       for (i = 0; i < ARRAY_SIZE(top_mtk_muxes); i++)
+               if (top_mtk_muxes[i].id == CLK_TOP_MFG)
+                       break;
+       if (i == ARRAY_SIZE(top_mtk_muxes))
+               return -EINVAL;
+
+       mfg_mux_nb->ops = top_mtk_muxes[i].ops;
+       mfg_mux_nb->bypass_index = 0; /* Bypass to 26M crystal */
+
+       return devm_mtk_clk_mux_notifier_register(dev, clk, mfg_mux_nb);
+}
+
 static int clk_mt8186_topck_probe(struct platform_device *pdev)
 {
        struct clk_hw_onecell_data *clk_data;
@@ -730,6 +752,11 @@ static int clk_mt8186_topck_probe(struct platform_device *pdev)
        if (r)
                goto unregister_composite_muxes;
 
+       r = clk_mt8186_reg_mfg_mux_notifier(&pdev->dev,
+                                           clk_data->hws[CLK_TOP_MFG]->clk);
+       if (r)
+               goto unregister_composite_divs;
+
        r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
        if (r)
                goto unregister_composite_divs;